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Tokyo Electron and Samsung Boost Capex for Hybrid Bonding Equipment Amid Advanced Packaging Shift

Mordor Intelligence Japan, South Korea
Overview
Tokyo Electron and Samsung are significantly increasing capital expenditures for hybrid bonding and general bonding equipment, targeting long-term growth in the Through-Silicon Via (TSV) market for GPUs and AI accelerators. This investment is crucial for HBM4, as memory vendors outsource base-die logic to leading-edge foundries, demanding tighter TSV alignment tolerances and copper-to-copper bonding—making hybrid bonding indispensable. This strategic move aims to secure their leadership in the evolving advanced packaging landscape.
In Depth

Shift to Advanced Packaging and Investment Rationale

The semiconductor industry is approaching the physical limits of Moore’s Law, shifting the primary driver for performance improvement from traditional scaling to advanced packaging, particularly heterogeneous integration. High-performance chips like GPUs and AI accelerators require efficient, high-density integration of multiple dies to maximize data transfer speeds and power efficiency. To meet this demand, giants in semiconductor equipment and chip manufacturing, Tokyo Electron (TEL) and Samsung, are substantially increasing their capital expenditures for hybrid bonding and related bonding equipment. This strategic investment aims to secure long-term leadership in the Through-Silicon Via (TSV) market, a core technology for next-generation semiconductor products.

HBM4 and the Indispensability of Hybrid Bonding

Specifically, the advent of HBM4, the latest generation of High Bandwidth Memory, further elevates the importance of hybrid bonding technology. HBM4 involves more complex stacking of memory and logic base dies, leading to a dramatic increase in interconnection density. This necessitates finer pitches and higher connection reliability, levels that are challenging for traditional micro-bump bonding methods to achieve. Furthermore, there’s an accelerating trend for memory vendors to outsource the manufacturing of HBM base-die logic to leading-edge foundries like TSMC. This development increases the demand for stringent TSV alignment tolerances and robust copper-to-copper bonding requirements for integrating dies from different manufacturers with high precision. Hybrid bonding is recognized as the only viable solution capable of meeting these strict requirements.

Market Impact and Future Outlook

The substantial capital investments by Tokyo Electron and Samsung are expected to accelerate the industrial adoption of hybrid bonding technology, potentially establishing new standards for semiconductor manufacturing processes. TEL, as a leading supplier of bonding equipment, and Samsung, as a major manufacturer of advanced memory and system LSIs, will leverage their respective strengths to enhance mass production capabilities for HBM4 and subsequent high-performance chips. This move will serve as a foundational support for the continuous growth of the AI and HPC markets, fostering technological innovation across the entire supply chain. In the long term, hybrid bonding is anticipated to further enable the development of 3D-IC and chiplet technologies, solidifying its position as a key technology that pushes the boundaries of performance and efficiency across the semiconductor industry.

Source: https://www.mordorintelligence.com/industry-reports/through-silicon-via-tsv-for-gpu-and-ai-accelerators-market

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