Semiconductor Back-End– category –
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Semiconductor Back-End
Semiconductor Back-End Weekly Report October 4, 2026
▼ ▼ ▼ If the infographic makes you want to read the full report, please click the download button below. ▼ ▼ ▼ 📄 Weekly Report October 04, 2026 (PDF) — Download Weekly Report October 04, 2026 (PDF) — DownloadDownload 🎙 Podcast October 0... -
Semiconductor Back-End
Brewer Science: High-temp laser debonding specs for IMAPS 2026
Brewer Science USA Overview Brewer Science presented new data at IMAPS 2026 on its high-temperature resistant laser debonding materials specifically designed for advanced packaging Temporary Bonding/Debonding (TBDB) applications. This ne... -
Semiconductor Back-End
Resonac: First Japanese 12-inch SiC single crystal substrate
Semicon electronics Japan Overview Resonac Holdings announced the successful manufacturing and subsequent substrate processing of a 300mm (12-inch) SiC single crystal on September 15, 2026. This achievement marks a first for a Japanese c... -
Semiconductor Back-End
ERS electronic: Automated PLP system for 310x310mm substrates
Chiplet Marketplace Germany Overview ERS electronic has introduced a fully automated Panel-Level Packaging (PLP) system designed to enhance AI and chiplet architectures. This innovative system handles 310x310mm substrates, integrating th... -
Semiconductor Back-End
JDI Mobara Plant: Shinko Electric and FICT 2028 operation plan
EE Times Japan Japan Overview Shinko Electric Industries and FICT have acquired Japan Display's (JDI) Mobara plant in Chiba Prefecture, designating it as a core facility for advanced AI semiconductor packaging, with operations slated to ... -
Semiconductor Back-End
Cu-to-Cu Hybrid Bonding: Semiconductor backend specs explained
GenInnov USA Overview In semiconductor manufacturing, packaging, particularly pitch miniaturization in "vertical competition," is key to performance and cost reduction. Copper-to-copper hybrid bonding is emerging as a major breakthrough,... -
Semiconductor Back-End
NVHBM: Micron’s NVIDIA custom base die specs and 15% power cut
The Elec Inc. South Korea Overview Micron will outsource the base die for its custom NVHBM product, developed for NVIDIA and based on HBM4E, anticipating enhanced profitability. NVHBM achieves a 15% reduction in power consumption and up ... -
Semiconductor Back-End
Samsung zHBM: 3D architecture specs for 8x performance gains
PhotonCap South Korea Overview Samsung has introduced zHBM, an innovative 3D memory architecture concept that directly stacks High Bandwidth Memory (HBM) atop the processor, drastically shortening data paths and integrating dedicated coo... -
Semiconductor Back-End
Samsung HBM4E: Hybrid Copper Bonding cooling specs explained
CHOSUNBIZ South Korea Overview Samsung Electronics is intensifying efforts to manage the escalating heat generated by HBM4E, driven by dramatically expanding interposer sizes for AI semiconductors. The company is adopting Hybrid Copper B... -
Semiconductor Back-End
AMD Versal AI Core: Space-grade SoC specs for 15-year missions
AMD Newsroom USA Overview AMD has begun sampling its Versal AI Core XQRVC1902 adaptive SoC in an enhanced space-grade organic lidless package, specifically designed for space missions lasting up to 15 years. This novel package incorporat...