Semiconductor Back-End– category –
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Semiconductor Back-End
SK Hynix Poised to Dominate HBM4 Market with 70% Price Hike and $7B Global Investment for AI Acceleration
SK Hynix South Korea Overview SK Hynix, commanding over 60% of the high-bandwidth memory (HBM) market, projects a nearly 70% price increase for its next-generation HBM4, slated for 2026. To meet soaring AI demand, the company is committi... -
Semiconductor Back-End
APC 2026: Advanced Packaging, Interconnects, and Chiplets Propel AI Systems Beyond Traditional Scaling
SEMI Europe Europe Overview The Advanced Packaging Conference (APC) 2026 convened to address the critical role of power delivery and interconnect innovations in driving AI system performance. As traditional device scaling approaches its ... -
Semiconductor Back-End
ECTC 2026 Highlights Advanced Packaging Future: Glass Substrates and FOPLP at the Core of System Innovation
Advanced Packaging Magazine USA Overview ECTC 2026 emphasized a structural shift in semiconductor innovation, moving beyond transistor scaling to packaging and integration technologies. Noteworthy advancements in heterogeneous integratio... -
Semiconductor Back-End
Samsung’s Aggressive HBM4 Investment Targets Top HBM Market Share Next Year, Attracting NVIDIA and AMD Interest
Sammy Fans South Korea Overview According to UBS forecasts, Samsung Electronics is poised to become the world's leading HBM memory manufacturer next year, driven by aggressive investments and expanded production in HBM4. The rapid surge ... -
Semiconductor Back-End
Micron Initiates Mass Production of 36GB 12-Layer HBM4 for NVIDIA Vera Rubin, Boosts US Semiconductor Investment Over $250 Billion
openPR.com USA Overview Micron Technology commenced mass production of its advanced 36GB 12-layer HBM4 memory in March 2026, shipping to NVIDIA for its Vera Rubin platform. This move underscores the market's rapid shift towards higher-ca... -
Semiconductor Back-End
TSMC Achieves 98-99% Yield for AI Products on CoWoS 5.5x Process, Targets 14x Reticle Size Expansion by 2029
Wccftech Taiwan Overview TSMC Vice President Ho Chun announced remarkable 98% to 99% yields for multiple AI-related products assembled using the CoWoS 5.5x process. This exceptional achievement highlights TSMC's manufacturing prowess in ... -
Semiconductor Back-End
TSMC Doubles Advanced Packaging Capacity Over Three Years; Samsung Expands 2nm & Advanced Packaging Collaboration with Broadcom
BigGo Finance Taiwan Overview TSMC revealed it has doubled its advanced packaging capacity annually for the past three years but still lags behind surging AI chip demand, operating 10 dedicated facilities globally. Meanwhile, Samsung Ele... -
Semiconductor Back-End
Samsung Unveils zHBM, a 3D Logic-Memory Integrated AI Architecture, Alongside HBM4E/HBM5 Roadmap at FMS 2026
Samsung Semiconductor South Korea Overview Samsung presented its vision for next-generation AI infrastructure at FMS 2026, unveiling its HBM roadmap, including HBM4E and HBM5, and a novel 3D memory architecture called zHBM. This zHBM sol... -
Semiconductor Back-End
TSMC CoWoS & SoIC Packaging Become Primary AI Chip Bottleneck, Forecasting 10-20% Global Supply Shortfall by 2027 Amidst Doubling Demand
Exponential Industry Taiwan Overview TSMC's CoWoS and SoIC packaging technologies are identified as the primary physical constraints in AI GPU and accelerator production. Global CoWoS demand is projected to double from 1.3-1.4 million wa... -
Semiconductor Back-End
JEDEC Relaxes HBM4 Package Height to 775 µm, Enabling 12-Hi/16-Hi Stacks Without Immediate Cu-Cu Hybrid Bonding
Exponential Industry USA Overview JEDEC has relaxed the HBM4 package height specification from 720 µm to 775 µm, allowing for 12-Hi and 16-Hi stack HBM modules without immediate reliance on Cu-Cu hybrid bonding. HBM utilizes 3D stacked D...