Key Findings
Imec, in close collaboration with ASML and TSMC, unveiled a robust and scalable 300mm integration approach for n-type and p-type Field-Effect Transistors (FETs) based on 2D materials at the IEEE/JSAP Symposium 2026. This groundbreaking achievement marks a significant step towards making 2D-material transistors viable for industrial applications, crucial for unlocking the next frontier in semiconductor scaling.
Technical Details
2D materials (e.g., transition metal dichalcogenides like MoS2 and WSe2) possess extremely thin atomic layer structures, offering the potential for superior performance efficiency and lower power consumption than conventional silicon-based transistors by suppressing short-channel effects and providing excellent gate control. However, uniformly and reproducibly integrating these materials on large 300mm wafers has been a long-standing challenge. Imec and its partners have overcome the following key technical hurdles:
- Uniform Material Growth: Developed a process for uniformly growing large-area, high-purity 2D material films on 300mm wafers.
- Interface Quality Optimization: Minimized interface defects between the gate dielectric and 2D materials, improving transistor electrical characteristics.
- N-type and P-type FET Integration: Established methods for efficiently integrating both n-type and p-type FETs, essential for building logic circuits, on the same platform.
- Scalable Process: Ensured compatibility with the 300mm wafer process, the semiconductor industry standard, paving the way for future mass production.
This integrated approach is an indispensable step in translating the theoretical advantages of 2D-material transistors into practical semiconductor devices.
Background & Context
The semiconductor industry faces physical limits to Moore’s Law and is actively exploring new materials and device architectures. 2D-material transistors are garnering significant attention as next-generation scaling technology due to their potential to maintain performance even when channel lengths shrink to a few nanometers or less. However, scaling up laboratory-level achievements to an industrially viable level required solving complex challenges in material synthesis, process integration, and device design. The collaboration between core semiconductor ecosystem players—ASML, TSMC, and Imec—has accelerated the bridge from R&D to practical application, leading to a significant leap forward in this area of technological innovation.
Strategic Significance & Outlook
This 300mm integration breakthrough has the potential to dramatically accelerate the commercialization of 2D-material transistors. This promises further performance improvements and energy efficiency gains in future microprocessors and memory devices. Moreover, this advancement in foundational front-end technology is closely related to the evolution of advanced packaging techniques like chiplet integration and 3D stacking. By providing new device layers that enable high-density integration, it will significantly impact the overall semiconductor industry roadmap. 2D materials are expected to open new avenues for boosting the performance of a wide range of applications, including AI, HPC, and mobile devices.
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