Intel Accelerates Next-Gen AI Semiconductor Development in U.S. Fabs with Foveros and Enhanced EMIB-T Packaging

August 2, 2026

Intel USA

Overview

Intel is aggressively advancing next-generation AI semiconductor development in its U.S. fabs by leveraging cutting-edge advanced packaging technologies such as Foveros stacking, EMIB silicon bridges, and particularly EMIB-T. EMIB-T significantly improves power efficiency and signal routing by integrating power delivery channels directly within the bridge, specifically addressing the stringent requirements of HBM technology. This initiative strengthens the U.S. semiconductor supply chain and solidifies Intel’s technological leadership in enabling high-performance computing for the AI era.

In Depth

Key Findings

Intel is accelerating the development of next-generation AI semiconductors by utilizing its state-of-the-art U.S. fabrication facilities to advance innovative packaging technologies, including Foveros stacking, EMIB silicon bridges, and the enhanced EMIB-T. This strategic focus aims to deliver AI accelerators that achieve both high performance and superior power efficiency.

Technical and Business Details

At the core of Intel’s advanced packaging strategy are Foveros, which enables vertical stacking of multiple dies, and EMIB (Embedded Multi-die Interconnect Bridge), facilitating horizontal connectivity between dies. EMIB-T (EMIB with Through-silicon vias for power delivery) represents a further evolution of EMIB. By incorporating direct power delivery channels (TSVs) within the silicon bridge, EMIB-T dramatically boosts power delivery efficiency to the chips while simultaneously optimizing signal routing. This advancement is crucial for meeting the demanding power and data transmission requirements of High Bandwidth Memory (HBM) technology, effectively resolving power delivery challenges when HBM and compute dies are placed adjacently. Intel is developing and producing these technologies within its U.S. manufacturing sites, ensuring a robust and secure supply chain by integrating design, manufacturing, and packaging processes.

Background and Industry Context

The progression of AI and high-performance computing (HPC) mandates semiconductor chips with increasing core counts, higher data throughput, and lower power consumption. However, achieving all these attributes with a single, massive monolithic die has become increasingly challenging due to manufacturing costs and yield considerations. Consequently, “heterogeneous integration,” which combines multiple smaller chiplets using advanced packaging, has emerged as a key strategy for enhancing performance and efficiency. Intel’s Foveros and EMIB-T are at the forefront of this heterogeneous integration strategy, offering solutions that maximize overall system performance while increasing chip design flexibility.

Strategic Significance and Outlook

Intel’s strengthening of advanced packaging development and production within the U.S. aligns with the U.S. government’s initiative to bring semiconductor manufacturing back onshore, contributing to geopolitical risk mitigation. Technological innovations like EMIB-T directly lead to improved performance in next-generation AI accelerators, accelerating the realization of diverse AI applications in data centers, edge AI, and autonomous driving. Intel is expected to further solidify its leadership in the semiconductor market through continuous investment and innovation in this domain during the AI era.

Source: https://newsroom.intel.com/intel-foundry/intels-us-advanced-packaging-enables-next-generation-ai-semiconductors

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