Panel-Level Superiority in Advanced Packaging
With the ongoing evolution of AI and high-performance computing (HPC), the integration density and performance of semiconductor chips are rapidly advancing, increasing the significance of advanced packaging technologies. The proliferation of chiplet architectures, in particular, demands packaging solutions that can efficiently and densely integrate multiple smaller chips. ASE’s newly developed 310mm x 310mm Panel-Level Packaging (PLP) offers distinct advantages over conventional wafer-level packaging (WLP), which uses circular wafers. By utilizing larger, rectangular substrates, PLP enhances material utilization efficiency and dramatically increases the number of chips that can be processed simultaneously. This approach is expected to lead to significant reductions in manufacturing costs and improvements in throughput.
Technical Specifications and Production Capabilities
This innovative automated PLP production line provides an expansive usable packaging area of up to 96,100 mm². This represents a substantial improvement in area efficiency compared to WLP, offering particular benefits for large AI processors and complex chiplet integrations. The new line ensures compatibility with ASE’s existing advanced packaging platforms, FOCoS (Fan-Out Chip-on-Substrate) and FOCoS-Bridge (Fan-Out Chip-on-Substrate with Bridge), supporting line/space capabilities of 2/2µm and 8/8µm respectively. Such fine-pitch wiring capabilities are essential for achieving high-density interconnections and enabling high-speed data transfer between chiplets. ASE aims to commence mass production on this groundbreaking PLP line by the first half of 2027.
Market Impact and Future Outlook
The introduction of panel-level packaging by ASE is expected to significantly contribute to reducing manufacturing costs and expanding the supply capacity of AI chips and chiplet-based semiconductor products. More efficient manufacturing processes will accelerate the widespread adoption of high-performance AI hardware, thereby fostering further advancements in AI technology. Furthermore, this technology has the potential for broad adoption across various sectors, including HPC, data centers, and autonomous vehicle chips, where high-density integration is crucial. ASE’s move is anticipated to further solidify its leadership in the advanced packaging market and serve as a crucial step in driving innovation across the entire semiconductor industry.
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