Key Findings
During the OCP APAC 2026 summit, Jun He, TSMC’s Vice President of Advanced Packaging Technology & Service, announced that the escalating demand for AI computing is dramatically increasing the complexity of chip integration. This shift means that competition in advanced packaging is no longer confined to single-device performance but has transitioned to overall reliability and validation at the package, board, system, and even rack levels. He emphasized that traditional component-only certification is insufficient for the unprecedented quality, reliability, and development speed required by AI systems, making comprehensive 3DIC (3D Integrated Circuit) validation essential.
Technical Details
- While traditional semiconductor development primarily focused on individual chip performance and reliability, the AI era is seeing complex 2.5D/3D packages (e.g., TSMC’s CoWoS), integrating HBM (High Bandwidth Memory) with GPUs and CPUs, becoming the standard. In these systems, where numerous disparate chips operate cooperatively, not only individual chip performance but also comprehensive thermal management, power delivery, signal integrity, and long-term reliability of the entire integrated system become paramount.
- Jun He highlighted the critical importance of 3DIC validation. This involves not merely evaluating the electrical characteristics and physical structures of packaged chips but also simulating and validating their operation within the broader context of the board, system, and even the entire data center rack. This approach prevents unforeseen interactions and performance degradation, ensuring stable operation of AI systems.
Background & Context
The evolution of AI is driving a new paradigm shift in semiconductor design and manufacturing. Particularly, complex AI workloads like large language models (LLMs) demand massive data processing and ultra-high-speed communication between processors and memory. Consequently, advanced packaging, including chiplet technology and heterogeneous integration, has become a primary means of enhancing semiconductor performance. In this context, the expansion of foundry roles like TSMC, from mere manufacturing contractors to solution providers assisting customers with overall system design and validation, marks a significant turning point for the industry.
Strategic Significance & Outlook
TSMC’s statement underscores that advanced packaging is at the forefront of technological competition in the AI era. The focus on system-level reliability and validation will lead to the provision of more reliable solutions for AI chip designers and data center operators. Moving forward, major foundries like TSMC are expected to collaborate more closely with customers, offering comprehensive services, including 3DIC validation, to accelerate the development speed of AI systems and reduce time-to-market. This approach is indispensable for supporting the further widespread adoption of AI technology and the sustained growth of the semiconductor industry.
Source: https://www.digitimes.com/news/a20260811PD258/packaging-tsmc-demand-design-development.html
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