Semiconductor Back-End– category –
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AI-Driven Advanced Packaging Orders Surge, Widening ABF Carrier Board Supply-Demand Gap, Benefiting Industry with Both Volume and Price Increases
AlphaWire International Overview Nomura Securities reports the semiconductor packaging substrate industry is experiencing a strong AI-driven recovery, with global packaging substrate shipments up 36% year-on-year in June 2026. This growt... -
Japan’s Rapidus Partners with IBM on 2nm Semiconductor Manufacturing to Bolster Indo-Pacific Supply Chain Resilience
Geopolitical Analysis / Think Tank International Overview Japan's Rapidus, in partnership with IBM, aims to establish 2nm advanced semiconductor manufacturing in Japan, strengthening the Indo-Pacific supply chain, including ASEAN countri... -
TSMC Achieves Record Q2 Revenue of $40.2B with 67.7% Gross Margin, CoWoS Fully Booked Through 2026, and Maps 14-Reticle Packaging
LongYield - Substack International Overview TSMC reported record Q2 2026 consolidated revenue of $40.20 billion and a gross margin of 67.7%, driven by robust AI chip demand and leading-edge nodes (7nm and below accounting for 77% of wafe... -
TSMC’s N3 Node and Expanding CoWoS Capacity Solidify Nvidia’s Future, While HBM4 Multi-Vendor Qualification Reduces Supply Risk
Seeking Alpha USA Overview TSMC and ASML's raised guidance confirms persistent AI infrastructure demand-supply imbalance. TSMC's N3 node, utilized for Nvidia's Rubin GPUs, is fully booked, and CoWoS advanced packaging capacity is expandi... -
TSMC Leads in Data Center Co-Packaged Optics, While Samsung Pursues Future AI Packaging with HBM, Logic, and SiPh Integration in ‘2.xD’ Technology
KuCoin International Overview TSMC leads the data center co-packaged optics (CPO) switch market, with Broadcom and NVIDIA already sampling or shipping CPO switches based on TSMC's technology. Concurrently, Samsung is developing '2.xD' ad... -
TSMC’s CoWoS Supply to Reach At Least 200K Wafers Monthly by 2027, Accelerating Expansion to Meet Soaring AI Demand
DigiTimes Taiwan Overview TSMC is accelerating its CoWoS (Chip-on-Wafer-on-Substrate) advanced packaging capacity expansion to meet robust AI chip demand, with market indications suggesting monthly output will reach at least 200,000 wafe... -
HBM Supply Crunch Deepens: DRAM Wafer Production and Advanced Packaging/Test Emerge as Dual Bottlenecks Amid Samsung, SK Hynix, Micron Rivalry
Industry Analysis International Overview High Bandwidth Memory (HBM), central to AI, faces dual bottlenecks in both DRAM wafer manufacturing and advanced packaging/test capacity. HBM achieves high bandwidth and energy efficiency through ... -
Rapidus to Establish 2nm AI Chip Mass Production by 2027, Bolstering Japan’s Semiconductor Ecosystem
DataM Intelligence International Overview Japan's Rapidus, backed by government and private funding, aims to establish domestic 2nm advanced semiconductor manufacturing and mass produce AI chips by 2027. This initiative will stimulate de... -
Applied Materials Highlights MES’s Critical Role in Recovering Capacity and Managing Complexity for Advanced Packaging and Test Facilities
Applied SmartFactory Solutions (Applied Materials) USA Overview Applied Materials emphasizes the crucial role of Manufacturing Execution Systems (MES) in advanced packaging and test (ATP) facilities for capacity recovery, loss reduction,... -
AI Era Semiconductor Equipment Theme: Applied Materials Forecasts Over 50% Advanced Packaging Revenue Growth in 2026, Micron Boosts HBM Packaging Capabilities
TradingKey International Overview As AI chip evolution heavily relies on chiplets and advanced packaging beyond transistor shrinkage, Applied Materials anticipates over 50% growth in its advanced packaging revenue in 2026, while KLA expe...
