New Technology– category –
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Synopsys Enhances Power and Performance for AI and Multi-Die Designs on Latest Samsung Foundry Processes
Chiplet News USA Overview Synopsys announced solutions at SAFE Forum 2026 to enhance power efficiency and performance for AI and multi-die designs, leveraging Samsung Foundry’s latest process technologies. This initiative directly addres... -
Samsung Reportedly to Launch Physical AI Chiplet Platform Next Year, Accelerating AI Inference and Infrastructure
Design And Reuse South Korea Overview Samsung is reportedly planning to launch a physical AI chiplet platform as early as next year, aiming to accelerate next-generation chip development for AI inference and infrastructure. This platform... -
Fraunhofer IPMS Develops High-Density Chiplet Systems at Wafer Level, Advancing Integration for AI and HPC
Design And Reuse Germany Overview Fraunhofer IPMS has developed high-density chiplet systems at the wafer level, aiming to enhance integration for AI and high-performance computing (HPC) applications. This research contributes to the min... -
SK Group Chairman Deepens AI Alliances with Nvidia and TSMC, Expanding Next-Gen HBM and Advanced Packaging Collaboration
The Korea Herald South Korea Overview SK Group Chairman Chey Tae-won has strengthened alliances with leading AI chipmakers, meeting with Nvidia CEO Jensen Huang and later with TSMC Chairman C.C. Wei in Taiwan. Discussions focused on expa... -
Marvell Unveils Industry’s First 102.4 Tbps AI Switch, Doubling Bandwidth for AI Data Center Networks
Advanced Packaging News USA Overview Marvell announced the industry's first 102.4 Tbps AI switch, setting a new benchmark for network bandwidth in AI data centers. This innovative switch doubles bandwidth compared to current top-performi... -
Hybrid Bonding Unlocks New Frontiers in 3D Integration, Driving AI Accelerators and Chiplet Designs
PatSnap UK Overview Hybrid bonding, an innovative 3D integration technology, enables both electrical continuity and mechanical integrity without solder or microbumps by combining metal-to-metal (primarily Cu-Cu) and dielectric-to-dielect... -
Intel Commits to Massive Advanced Packaging Push for Foundry Revival, EMIB Capacity Expansion Key
BusinessKorea USA Overview Intel is committing to a massive expansion of its advanced semiconductor packaging capabilities to accelerate its foundry business revival, with a core focus on expanding its proprietary EMIB (Embedded Multi-di... -
Hiwin and Qualcomm Integrate Edge AI into Panel-Level Semiconductor Packaging to Enhance Production Accuracy and Throughput
Packnode Taiwan Overview Taiwanese motion control specialist Hiwin Technologies is collaborating with Qualcomm to integrate Dragonwing Q6 Edge AI into panel-level semiconductor packaging (PLP) equipment. This partnership combines machine... -
Dow Showcases Next-Gen AI Thermal Management Technologies at COMPUTEX Taipei 2026, Supporting 400G+ Optical Transceivers
chemXplore USA Overview Dow showcased next-generation thermal management technologies for AI servers and high-speed optical transceivers at COMPUTEX Taipei 2026. The company presented thermal interface materials (TIMs) and silicone-based... -
CEA-Leti Demonstrates 1µm Pitch Die-to-Wafer Hybrid Bonding, Addressing AI Hardware Bottlenecks
Chiplet Marketplace France Overview CEA-Leti announced a significant advancement at ECTC 2026, demonstrating functional test vehicles utilizing die-to-wafer (D2W) hybrid bonding down to 1µm pitch, poised to resolve critical AI hardware b...
