Semiconductor Back-End– category –
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TSMC’s CoWoS Shortage Eases, But Bottleneck Shifts to ‘Hyper-Scale Packaging’ as Google Reportedly Engages Samsung for TPU Production
Zhitong Finance APP Hong Kong Overview Reports suggest Google is in discussions with Samsung Electronics regarding the production of specific hardware components for its AI training and inference Tensor Processing Units (TPUs), highlight... -
Park Systems and imec Forge Alliance for Next-Gen 3D Packaging and Logic Metrology
imec Official Press Release ベルギー Overview Nano-metrology leader Park Systems has launched a two-year Joint Development Program (JDP) with imec, a global semiconductor research powerhouse. The partnership focuses on creating cutting-e... -
ASE Technology Raises 2026 LEAP Revenue Outlook Above $3.5 Billion, Driven by Soaring AI Advanced Packaging Demand
Zacks USA Overview ASE Technology Holding expressed strong confidence in its Leading Edge Advanced Packaging (LEAP) business trajectory, raising its 2026 LEAP revenue outlook by 10% to over $3.5 billion. This upward revision explicitly r... -
Glass Core Substrates Emerge as Next-Gen AI/HPC Packaging Technology, Face Commercialization Hurdles in Brittleness and TGV Formation
Pandaily China Overview Glass core substrates are garnering significant attention in the semiconductor packaging industry, driven by escalating performance demands in AI chips, HPC, and advanced processor packaging. They offer superior d... -
Henkel Expands Electronics Materials Investment in Korea, Bolstering HBM Packaging Material Development for Surging AI Semiconductor Demand
The Elec Inc. South Korea Overview German materials giant Henkel is expanding its investment in the electronics materials business in South Korea to meet the escalating demand for AI semiconductors. This includes reinforcing R&D pers... -
TSMC Strengthens Glass Substrate Supply Chain for CoWoS, Achieving 16% Warpage Reduction for High-Performance AI GPUs
Wccftech USA Overview TSMC is expanding its glass substrate supply chain for advanced CoWoS packaging, collaborating with Innolux and Ibiden. Glass substrates demonstrate a 16% reduction in package warpage, along with improved thermal ex... -
ABF Substrates Become AI Accelerator Bottleneck, Nvidia’s H100 Requires 12+ Layers; Glass Substrates Emerge as Next-Gen Solution, Commercialization Years Away
Data Gravity USA Overview Ajinomoto Build-up Film (ABF) substrates are a critical component and growing bottleneck in AI accelerators, HBM, and chiplet-based designs. Nvidia's H100 GPU demands over 12 layers of ABF, with the Blackwell B2... -
TSMC’s CoWoS Capacity, Targeting 125K-130K Wafers/Month by 2026, Still Falls Short as Nvidia Reserves 60% of Output
INDmoney India Overview TSMC's CoWoS advanced packaging remains a hidden bottleneck in AI chip supply, despite targeting 125,000-130,000 wafers per month capacity by the end of 2026. Demand continues to outstrip supply, with TSMC's CEO s... -
TSMC Narrows CoWoS Supply-Demand Gap from 20% to 10% by End of 2026; NVIDIA to Adopt Next-Gen CoPoS for 2028-2029 Mass Production
Moomoo Singapore Overview TSMC is accelerating advanced packaging capacity expansion, projecting its CoWoS supply-demand gap to significantly narrow from approximately 20% to 10% by the end of 2026. Concurrently, research and development... -
AT&S Unveils €2 Billion Kulim Expansion to Fuel AI Boom with Advanced IC Substrates and PCBs
AT&S Official Press Release オーストリア Overview AT&S is undertaking a monumental €1.5 billion to €2 billion expansion of its Kulim, Malaysia, manufacturing facility. Driven by long-term commitments from industry leaders like AMD, t...
