COMPANY PROFILE / NANOTECHNOLOGY
TSMC (Taiwan Semiconductor Manufacturing Company)
A contract chipmaker that has moved its customers' designs from FinFET to nanosheet transistors in the 2-nanometer generation
TSMC belongs in a nanotechnology series because it mass-produces its customers' chip designs as nanoscale transistors. In 2025 it reported net revenue of NT$3,809 billion (US$121.4 billion) and had 90,557 employees. 74% of its wafer revenue came from 7-nanometer technology and below, and the company says its 2-nanometer generation (nanosheet transistors) entered volume production in the fourth quarter of 2025. In April to June 2026, 2-nanometer accounted for 3% of wafer revenue and 3-nanometer for 30%. It is also a company with highly concentrated customers: 75% of revenue came from North America, and its largest customer accounted for 19% of net revenue (not named). Separate from our profile of TSMC under advanced packaging, this one takes the view of nanoscale transistors and patterning, and sets out, from the company's own official material, what it makes, where it invests, who it works with, and which parts are results and which are plans. It is not investment advice.
- TSMC in 30 seconds, and where it stands in nanotechnology
- The logo and how the name is written
- Where the company sits in the field
- Scale (centered on what relates to nanoscale transistors)
- Resources committed to nanotechnology
- What it has done so far
- What comes next
- What the company is aiming for in nanotechnology
- Map of partnerships in nanotechnology
- Technologies, products and services
- The risks this company carries
- Glossary, references and claim-to-source audit
1. TSMC in 30 seconds, and where it stands in nanotechnology
NYSE (ADSs, since 1997)Taiwan listing on 5 September 1994; NYSE listing of ADSs on 8 October 1997
(US$121.4 billion)+31.6% year on year (our calculation). Wafer fabrication is about 86% of net revenue
TSMC is a foundry: it does not sell products of its own. It manufactures, on behalf of customers, the chips they have designed. Unlike the equipment makers Tokyo Electron and ASML, TSMC is the side that uses such tools to build the transistor structures and manufacturing processes Sourced. What this profile watches is that the transistor structure has shifted from the "FinFET" (a fin-shaped three-dimensional channel) to the "nanosheet". TSMC describes its 2-nanometer generation, N2, as its first-generation nanosheet transistor technology and says it entered volume production in the fourth quarter of 2025 Sourced. But names such as "2 nm" and "3 nm" are the company's own generation names, and TSMC's material does not say they refer to a particular dimension of the transistor (as far as this article could confirm). We also could not find numerical gains in speed, power or density for each generation on the official technology pages Not yet confirmed.
2. The logo and how the name is written
A note on names: the formal name is Taiwan Semiconductor Manufacturing Company Limited, commonly TSMC. JASM (Kumamoto), ESMC (Dresden, Germany) and TSMC Arizona are subsidiary names, separate legal entities from TSMC itself. N2, N3, A16 and similar labels are names of manufacturing technologies (processes), not company or product names. The logo was taken from the company's official website (tsmc.com); the image is small.
Official site: https://www.tsmc.com/english3. Where the company sits in the field
TSMC's main type is devices & displays (turning nanostructures into products). From its customers' chip designs it produces wafers carrying transistors numbering in the billions to tens of billions Sourced. The transistor structure and stage of each generation that TSMC publishes are as follows.
| Generation (process name) | Transistor structure | Stage (as confirmed on 9 October 2026) | Type |
|---|---|---|---|
| N7 (7-nanometer), N5 (5-nanometer) | FinFET | Volume production began in 2018 (N7) and 2020 (N5) | Sourced |
| N3 (3-nanometer) and variants (N3E, N3P, N3A) | FinFET | Volume production in 2022. N3A, for automotive use, was released to customers at the end of 2025. The 3-nanometer family as a whole was 24% of 2025 wafer revenue | Sourced |
| N2 (2-nanometer) | Nanosheet (first generation) | Volume production began in the fourth quarter of 2025 (company statement). Fab 20 and Fab 22 are the 2-nanometer fabs. 3% of wafer revenue in April to June 2026 | Sourced |
| N2P | Nanosheet | Volume production planned for the second half of 2026 (official site) | Not yet confirmed |
| A16 (16-angstrom) | Nanosheet plus backside power rail | Risk production expected in 2026 (20-F). The official page gives no volume production date | Not yet confirmed |
| A14, A12 | A14: full-node gains through dimensional scaling. A12: nanosheet plus a second-generation backside power rail | No timing on the official pages. Research is under way on 10-, 14- and 16-angstrom generations (20-F) | Not yet confirmed |
A backside power rail routes the power wiring to the back side of the wafer (see our explainer on nanoscale transistors). The official pages give no figures for performance or density gains by generation, so none are given here. Reference: Reference 3 https://www.tsmc.com/english/dedicatedFoundry/technology/logic Reference 2 https://www.tsmc.com/english/dedicatedFoundry/technology/logic/l_2nm Reference 4 https://www.tsmc.com/english/dedicatedFoundry/technology/logic/l_A16 Reference 5 https://www.tsmc.com/english/dedicatedFoundry/technology/logic/l_A14 Reference 1 https://www.sec.gov/Archives/edgar/data/1046179/000162828026025362/tsm-20251231.htm Reference 6 https://pr.tsmc.com/english/news/3326
In short, by application, high-performance computing (HPC, such as GPUs for AI) was 58% of 2025 net revenue and smartphones 29% Sourced. The company says these two applications drive demand for the leading-edge nanosheet generations (20-F).
4. Scale (centered on what relates to nanoscale transistors)
TSMC is a large company at the center of the global semiconductor industry. The company as a whole is summarized briefly, with the focus on figures tied to the nanoscale generations (revenue by technology) Sourced.
| Indicator | Value | Note |
|---|---|---|
| Net revenue (2025) | NT$3,809,054 million | US$121,423 million (company conversion). 2024 was NT$2,894,308 million (+31.6%, our calculation) |
| Net income attributable to the parent (2025) | NT$1,697,604 million | US$54,116 million (company conversion) |
| Latest quarter (April to June 2026) | Net revenue NT$1,270.4 billion (US$40.2 billion) | Net income NT$706.6 billion. Outlook for July to September 2026: net revenue of US$44.6 to 45.8 billion (company outlook) |
| Wafer revenue by technology (2025) | 3-nanometer 24%, 5-nanometer 36%, 7-nanometer 14% | 7-nanometer and below combined: 74% (69% in 2024, 58% in 2023). 16-nanometer 7%, 28-nanometer 7% and others |
| Wafer revenue by technology (April to June 2026) | 2-nanometer 3%, 3-nanometer 30%, 5-nanometer 33%, 7-nanometer 11% | 7-nanometer and below combined: 77% |
| Net revenue by platform (2025) | HPC 58%, smartphones 29% | IoT 5%, automotive 5%, digital consumer electronics 1%, others 2% |
| Net revenue by region (2025) | North America 75% | Asia Pacific 9%, China 9%, Japan 4%, EMEA 3% (company categories) |
| Annual capacity (2025) | More than 17 million wafers (12-inch equivalent) | Increase driven mainly by expansion of 3-nanometer |
| Employees (end of 2025) | 90,557 | Professionals 44,690, technicians 24,917 and others. 83,825 in 2024 |
Reference: Reference 1 https://www.sec.gov/Archives/edgar/data/1046179/000162828026025362/tsm-20251231.htm Reference 6 https://pr.tsmc.com/english/news/3326 Reference 7 https://investor.tsmc.com/english/quarterly-results/2026/q2
The shares for "3-nanometer", "2-nanometer" and so on are the share of wafer revenue by generation names as the company classifies them. They are not figures that compare the contents of each generation (transistor dimensions or structure) on a common basis, and they do not mean the same performance as a similarly named generation at another company. This article does not rank TSMC's generations against others'. The 75% of revenue from North America looks like a split by customer location, but we did not examine the 20-F's definition of the regional categories in detail Not yet confirmed.
5. Resources committed to nanotechnology
Headcount and spending devoted to the nanoscale generations alone are not disclosed. The table below shows company-wide disclosures.
| Resource | What primary sources confirm | Type |
|---|---|---|
| People | 90,557 employees (end of December 2025), with sites in Taiwan and also in the U.S., Japan, China, Germany and elsewhere. Headcount for R&D alone is not disclosed | Sourced / partly undisclosed |
| Money (R&D) | 2025 R&D spending was NT$246.4 billion (US$7.86 billion, 6.5% of net revenue), up 20.7% year on year. The company attributes the rise mainly to more research on 10-, 14- and 16-angstrom generations. It says it will keep investing significantly in 2026. A breakdown by product is not disclosed | Sourced |
| Money (capex) | 2025 capital expenditure was NT$1,272.4 billion (US$40.9 billion, about 33% of net revenue: our calculation). The 2026 outlook is US$52 to 56 billion (as of April 2026), centered on adding 2-nanometer and 3-nanometer capacity (Fabs 20, 21 and 22). In August 2026 the board approved capital appropriations of about US$29.4 billion | Sourced / outlook not yet confirmed |
| Equity stakes, acquisitions, joint ventures, divestments | JASM (Kumamoto, Fab 23): TSMC holds about 72.6%; Sony (under 20%), DENSO (over 10%) and Toyota (minority) are shareholders. ESMC (Dresden, Germany): TSMC 70.0%, with Bosch, Infineon and NXP at 10% each. Joint venture with Sony Semiconductor Solutions (Kumamoto, image sensors): TSMC to contribute up to ¥282 billion (agreed August 2026, subject to approvals). No major divestment or withdrawal was found in the material reviewed | Sourced |
| Universities, research institutes and public funding | Under agreements with the U.S. Department of Commerce (November 2024), TSMC Arizona is to receive up to US$6.6 billion in direct funding and up to US$5 billion in loans (CHIPS Act). The German federal government is to give ESMC up to €5 billion in state aid (December 2024). R&D is described as involving customers, equipment vendors and "external research and development consortia", but the 20-F names no consortium or university | Sourced / partly not found |
Reference: Reference 1 https://www.sec.gov/Archives/edgar/data/1046179/000162828026025362/tsm-20251231.htm Reference 8 https://pr.tsmc.com/english/news/3332 Reference 9 https://pr.tsmc.com/english/news/3333
Status of main fabs and capacity
| Fab | Site | Most advanced technology / scale | Stage | Date | Reference |
|---|---|---|---|---|---|
| Fab 20, Fab 22 | Taiwan (Fab 20 in Hsinchu, Fab 22 in Kaohsiung) | 2-nanometer production fabs; a focus of 2026 capex | In operation (commercial production began in 2025) | 2025 | 1, 2 |
| Fab 18 | Taiwan (Southern Taiwan Science Park) | 3-nanometer | In operation (since 2020) | 2020 onward | 1 |
| Fab 21 (TSMC Arizona) | Phoenix, Arizona, U.S. | 5-nanometer (as of end-2025) | First fab in volume production. Second fab under construction; third fab started in 2025; more land acquired in 2026 | End-2024 onward | 1 |
| Fab 23 (JASM) | Kumamoto, Japan | 28-nanometer | First fab in volume production (December 2024). Second fab started construction in October 2025 | 2024 to 2025 | 1 |
| Fab 24 (ESMC) | Dresden, Germany | For specialty technologies and advanced packaging | Under construction (started 2024) | 2024 onward | 1 |
Monthly output per fab is not disclosed. Companywide annual capacity is more than 17 million wafers (12-inch equivalent).
6. What it has done so far
| When | What happened | Why it matters |
|---|---|---|
| 21 February 1987 | Incorporated as a joint venture of the R.O.C. government and private investors (company statement). The company calls itself the "longest existing dedicated foundry" | A division of labor: customers design, TSMC manufactures |
| 1994 and 1997 | Listed on the Taiwan Stock Exchange (September 1994) and listed ADSs on the NYSE (October 1997) | The basis for raising capital |
| 2018, 2020 and 2022 | Began volume production of 7-nanometer (2018), 5-nanometer (2020) and 3-nanometer FinFET (2022) (official site) | Shrinking FinFET step by step |
| November 2024 | Agreed with the U.S. Department of Commerce on CHIPS Act direct funding (up to US$6.6 billion) and loans (up to US$5 billion) | Funding for leading-edge fabs in the U.S. |
| December 2024 | ESMC agreed up to €5 billion of state aid with the German federal government. JASM's first fab began volume production. The first Arizona fab began volume production at the end of 2024 | Leading-edge and specialty fabs spread across Japan, the U.S. and Europe |
| 2025 | The 2-nanometer generation (N2, nanosheet) began volume production (the official site says the fourth quarter). Construction of the third Arizona fab began. JASM's second fab started construction in October | The transistor structure moved from FinFET to nanosheet |
| 16 April 2026 | Filed its Form 20-F for the year ended December 2025, stating that development of the 16-angstrom generation (A16) is on track, with risk production expected in 2026 | The main source for this article |
| 11 August 2026 | The board approved about US$29.4 billion in capital appropriations. Agreed on a joint venture with Sony Semiconductor Solutions for image sensors | Continued capex; a tie-up in Japan |
| 8 September 2026 | Announced with ASML an initiative to move to large-format photomasks (from 6-inch to 12-inch) for High NA EUV | Working with a tool maker on the size of the exposure mask |
Reference: Reference 1 https://www.sec.gov/Archives/edgar/data/1046179/000162828026025362/tsm-20251231.htm Reference 3 https://www.tsmc.com/english/dedicatedFoundry/technology/logic Reference 2 https://www.tsmc.com/english/dedicatedFoundry/technology/logic/l_2nm Reference 8 https://pr.tsmc.com/english/news/3332 Reference 9 https://pr.tsmc.com/english/news/3333 Reference 10 https://pr.tsmc.com/english/news/3338
7. What comes next
All of the above are company plans and outlooks Not yet confirmed. TSMC says its 2026 capital expenditure and new fab plans "may change according to market conditions". For July to September it gave an outlook for net revenue of US$44.6 to 45.8 billion (July 2026).
None of the following appears in the official material this article reviewed Not yet confirmed.
The gains in performance, power and density of each generation (no figures on the official technology pages) / customer-by-customer adoption of N2 and A16 / the volume production date of A16 / monthly output of each fab / an R&D breakdown by generation / the names of external research consortia or universities / the actual capex for April to June 2026.
8. What the company is aiming for in nanotechnology
This section separates what the company says directly from what this article reads into it. Inference marks this article's own interpretation of primary sources.
| What can be read | Primary source behind it | Type |
|---|---|---|
| It keeps renewing its generations almost every year | Beyond N2, the 20-F describes N2X for HPC, N2P for smartphones, development of the 16-angstrom generation (A16) and research on 10-, 14- and 16-angstrom generations. The official site also lists A14 and A12 | Sourced |
| It is moving transistors from FinFET to nanosheet, then improving wiring with backside power | Official site: N2 is first-generation nanosheet, A16 combines nanosheet with a backside power rail, and A12 has a second-generation backside power rail | Sourced |
| It puts yield in volume production at the nanoscale at the center of competition | 20-F: for advanced technologies, securing quality and yield is a challenge, and failure would mean lost revenue. It describes competition as being on earlier technology readiness, better quality, faster yield improvement and shorter cycle time | Sourced |
| It is preparing the next exposure generation (High NA EUV) with tool makers for production use from 2030 | The September 2026 announcement with ASML: an intention to use High NA in volume production from 2030, and preparation of large-format masks | Sourced (company intention) |
| It combines advanced packaging (3DFabric) with transistor scaling | 20-F: SoIC, CoWoS, InFO and other stacking and packaging services are provided to HPC customers | Sourced / Inference (the framing as a combination with scaling) |
The reading that "TSMC is trying to lead not only through transistor scaling but through the whole manufacturing system, including tools, masks and packaging" rests on the breadth of the company's own account. The 20-F says "the quality and technology of the equipment ... effectively define the limits of our process technologies" and that it holds regular meetings with suppliers on co-developing next-generation equipment Sourced. In September 2026 it also announced with ASML a move to large-format photomasks, which changes even the standard for the exposure mask Sourced. The 20-F, however, names no individual tool-maker co-development. This article therefore reads TSMC as designing nanoscale volume production as a combination of transistor structure, exposure, masks and packaging Inference Not yet confirmed.
9. Map of partnerships in nanotechnology
10. Technologies, products and services
TSMC's "products" are process technologies (generations) and their IP, plus advanced packaging services, used to manufacture chips that customers have designed Sourced. The table below lists what the company's material says.
| Technology / service | What the material says | Reference |
|---|---|---|
| N2 family (N2, N2P, N2X) | Nanosheet transistors in the 2-nanometer generation. N2X is aimed at the highest performance and clock frequency within the 2-nanometer family, for HPC; N2P is for smartphones. The official site says N2 delivers "full-node strides in performance and power consumption" (no figures given) | 1, 2 |
| N3 family (N3, N3E, N3P, N3X, N3A) | 3-nanometer FinFET, in volume production since 2022. N3A is for automotive use and was released to customers at the end of 2025. N3X is the highest-performance 3-nanometer option for HPC | 1, 3 |
| A16, A14, A12 | Nanosheet combined with a backside power rail (A16, A12). A14 targets full-node gains in power, performance and area through dimensional scaling. A16 risk production is planned for 2026; no timing is given for A14 and A12 | 4, 5, 3, 1 |
| Design infrastructure (OIP, 3Dblox) | Through the Open Innovation Platform (launched 2008), TSMC provides customers with EDA, IP and design kits. It announced EDA and IP readiness for 2-nanometer and A16 and contributed the 3Dblox standard to the IEEE | 1 |
| Advanced packaging (3DFabric: SoIC, CoWoS, InFO) | Services that integrate same-type and different chips through silicon stacking and advanced packaging, centered on HPC customers | 1 |
| Specialty technologies | RF, embedded non-volatile memory, PMICs, sensors and display chips. The company says 16-nanometer MRAM and 22ULL RRAM met automotive "Grade-1" requirements in 2025 | 1 |
TSMC is not itself a materials maker, but its material points to three places where materials matter. (1) Materials it buys: the 20-F says manufacturing uses silicon wafers, chemicals, gases and various precious metals. Most are available from several suppliers, but some come from a single source. Wafers are bought from a limited number of suppliers in Taiwan, Japan, Germany and Singapore Sourced. At the nanoscale, this article reads wafer flatness and defects and the purity of chemicals and gases as bearing directly on yield Inference. (2) Tools and materials together: the 20-F says "the quality and technology of the equipment ... effectively define the limits of our process technologies". Testing resist or film materials is therefore also a matter of co-development with tool makers Sourced. (3) Larger masks: the September 2026 announcement with ASML plans a move of High NA EUV photomasks from 6-inch to 12-inch, with a pilot line by 2031 and exposure system readiness by 2033 Sourced. It is a large change for mask substrates, films and inspection, but the announcement gives no detailed materials specifications Not yet confirmed. For the basics, see our explainers on nanoscale transistors, lithography and EUV, and resists and photomasks.
Reference: Reference 1 https://www.sec.gov/Archives/edgar/data/1046179/000162828026025362/tsm-20251231.htm Reference 2 https://www.tsmc.com/english/dedicatedFoundry/technology/logic/l_2nm Reference 3 https://www.tsmc.com/english/dedicatedFoundry/technology/logic Reference 4 https://www.tsmc.com/english/dedicatedFoundry/technology/logic/l_A16 Reference 5 https://www.tsmc.com/english/dedicatedFoundry/technology/logic/l_A14 Reference 10 https://pr.tsmc.com/english/news/3338
11. The risks this company carries
| Risk | What it involves | Type |
|---|---|---|
| Customer concentration | The ten largest customers were 78% of net revenue in 2025. The largest was 19% and the second 17% (22% and 12% the year before). 75% of revenue came from North America. Customers are not named | Sourced |
| Geopolitics and location | The 20-F says most of its principal executive officers and production facilities are in Taiwan, and most net revenue derives from operations there. Military, political and trade developments could affect the business | Sourced |
| Tariffs | The tariffs announced by the U.S. in April 2025 excluded semiconductors but still raised TSMC's costs in the U.S. In February 2026 the U.S. Supreme Court ruled that those tariffs were unlawful. A Section 232 investigation begun in April 2025 ended in December 2025, and a proclamation imposed a 25% tariff on certain advanced computing chips. In January 2026 a U.S.-Taiwan trade and investment agreement was announced (reciprocal tariff cap of 15%). The company says the details remain unclear | Sourced (different stages) |
| Export controls | U.S. rules of October 2022, October 2023 and January 2025 (some products at 16-nanometer and below need licenses for certain destinations). The Validated End-User authorization for the Nanjing fab expired in December 2025, and an annual export license was granted instead; there is no assurance of renewal. The company says current results have not been materially affected | Sourced |
| Conditions on subsidies | Subsidies such as those under the CHIPS Act carry conditions, including limits on expansion in countries of concern and on joint research. Non-compliance could lead to repayment | Sourced |
| Scale of capital expenditure | 2025 capex was about 33% of net revenue (our calculation), and 2026 is US$52 to 56 billion. If demand weakens, the burden of fixed costs grows | Sourced / Inference |
| Uncertainty of advanced technology | The 20-F says securing quality and yield for advanced technologies is difficult, and failure would mean lost revenue | Sourced |
| Power, water and materials | Power outages, water shortages, higher electricity prices and procurement of materials from a single source could affect production | Sourced |
| Delivery of plans | N2P, A16, the second and third Arizona fabs, the Sony joint venture and High NA deployment in 2030 are all company plans, and their achievement has not been confirmed | Not yet confirmed |
Reference: Reference 1 https://www.sec.gov/Archives/edgar/data/1046179/000162828026025362/tsm-20251231.htm Reference 10 https://pr.tsmc.com/english/news/3338 Reference 9 https://pr.tsmc.com/english/news/3333
12. Glossary
- Foundry
- A company that manufactures semiconductors designed by customers, on their behalf. TSMC calls itself a dedicated foundry.
- FinFET
- A transistor whose channel is a three-dimensional "fin" surrounded by the gate on three sides. Used up to the 3-nanometer generation.
- Nanosheet / GAA
- A structure in which the channel is made of thin stacked sheets and the gate surrounds them (gate-all-around). Adopted in the 2-nanometer generation.
- Backside power rail
- Routing the power wiring to the back of the wafer to reduce congestion in the front-side wiring. Used in A16 and A12.
- Generation name (node name)
- Labels such as "3 nm", "2 nm" and "A16". TSMC's material does not say they refer to a particular dimension.
- Risk production
- Trial production before volume production, limited to customer evaluation.
- High NA EUV
- Extreme ultraviolet exposure with a larger numerical aperture, used to print finer patterns.
- HPC
- High-performance computing, such as GPUs for AI and server processors.
- 3DFabric
- TSMC's umbrella name for its advanced packaging and stacking technologies, including SoIC, CoWoS and InFO.
- VEU
- Validated End-User: a U.S. export control authorization that removes the need for individual licenses for exports to a specific fab.
13. References
- TSMC (filed with the SEC) Annual Report on Form 20-F for the fiscal year ended December 31, 2025 (filed 16 April 2026). Business overview, fabs and technology, wafer revenue by technology and platform, R&D spending, capex, subsidiaries, CHIPS Act support, risk factors, headcount. https://www.sec.gov/Archives/edgar/data/1046179/000162828026025362/tsm-20251231.htm
- TSMC Official site, "2nm Technology". Positioning of N2 and N2P (checked 9 October 2026). https://www.tsmc.com/english/dedicatedFoundry/technology/logic/l_2nm
- TSMC Official site, "Logic Technology". List of logic technologies from N7 to A12 (checked 9 October 2026). https://www.tsmc.com/english/dedicatedFoundry/technology/logic
- TSMC Official site, "A16 Technology" (checked 9 October 2026). https://www.tsmc.com/english/dedicatedFoundry/technology/logic/l_A16
- TSMC Official site, "A14 Technology" (checked 9 October 2026). https://www.tsmc.com/english/dedicatedFoundry/technology/logic/l_A14
- TSMC News release "TSMC Reports Second Quarter EPS of NT$27.25" (16 July 2026). Revenue for April to June 2026 and wafer revenue by technology. https://pr.tsmc.com/english/news/3326
- TSMC Official investor site, "2026 Q2 Quarterly Results". April to June 2026 results and the July to September outlook. https://investor.tsmc.com/english/quarterly-results/2026/q2
- TSMC News release "TSMC Board of Directors Meeting Resolutions" (11 August 2026). Approval of capital appropriations and the joint venture with Sony. https://pr.tsmc.com/english/news/3332
- TSMC News release "Sony Semiconductor Solutions and TSMC Agreed to Establish Joint Venture for Next-Generation Image Sensors" (11 August 2026). https://pr.tsmc.com/english/news/3333
- TSMC News release "ASML and TSMC Announce Initiative to Pioneer Industry Transition to Large-Format Photomasks for High NA EUV" (8 September 2026). https://pr.tsmc.com/english/news/3338
- TSMC Official website (source of the logo image). https://www.tsmc.com/english
14. Claim-to-source audit
| Claim in the text | Type | Reference |
|---|---|---|
| Legal name, incorporation on 21 February 1987, headquarters (Hsinchu Science Park), Taiwan Stock Exchange listing (5 September 1994) and NYSE listing of ADSs (8 October 1997) | Sourced | Reference 1 https://www.sec.gov/Archives/edgar/data/1046179/000162828026025362/tsm-20251231.htm |
| 2025 net revenue of NT$3,809,054 million (US$121,423 million), net income of NT$1,697,604 million, wafer fabrication at about 86% of net revenue | Sourced | Reference 1 https://www.sec.gov/Archives/edgar/data/1046179/000162828026025362/tsm-20251231.htm |
| The +31.6% year-on-year figure, capex at about 33% of net revenue, and the placement of the US$29.4 billion capital appropriation | Our calculation | Our calculation from the figures in the references. Reference 1 https://www.sec.gov/Archives/edgar/data/1046179/000162828026025362/tsm-20251231.htm Reference 8 https://pr.tsmc.com/english/news/3332 |
| Wafer revenue by technology in 2025 (3-nanometer 24%, 5-nanometer 36%, 7-nanometer 14%, 7-nanometer and below 74%), by platform (HPC 58%, smartphones 29%) and by region (North America 75% and others) | Sourced | Reference 1 https://www.sec.gov/Archives/edgar/data/1046179/000162828026025362/tsm-20251231.htm |
| Net revenue of NT$1,270.4 billion (US$40.2 billion) and net income of NT$706.6 billion for April to June 2026, wafer revenue by technology (2-nanometer 3%, 3-nanometer 30%, 5-nanometer 33%, 7-nanometer 11%), and the July to September outlook | Sourced | The outlook is the company's forecast. Reference 6 https://pr.tsmc.com/english/news/3326 Reference 7 https://investor.tsmc.com/english/quarterly-results/2026/q2 |
| 90,557 employees (end of December 2025), and annual capacity of more than 17 million wafers (12-inch equivalent) | Sourced | Reference 1 https://www.sec.gov/Archives/edgar/data/1046179/000162828026025362/tsm-20251231.htm |
| N2 is first-generation nanosheet, volume production began in the fourth quarter of 2025, Fab 20 and Fab 22 are the fabs, and N2P is planned for the second half of 2026 | Sourced | The N2P timing is a company plan. Reference 2 https://www.tsmc.com/english/dedicatedFoundry/technology/logic/l_2nm Reference 1 https://www.sec.gov/Archives/edgar/data/1046179/000162828026025362/tsm-20251231.htm |
| A16 (nanosheet plus backside power rail), A14 and A12, and A16 risk production expected in 2026 | Sourced | Timing is a company plan. The official pages give no performance figures. Reference 4 https://www.tsmc.com/english/dedicatedFoundry/technology/logic/l_A16 Reference 5 https://www.tsmc.com/english/dedicatedFoundry/technology/logic/l_A14 Reference 3 https://www.tsmc.com/english/dedicatedFoundry/technology/logic Reference 1 https://www.sec.gov/Archives/edgar/data/1046179/000162828026025362/tsm-20251231.htm |
| Gains in performance, power and density for each generation | Not yet confirmed | No figures found on the official technology pages within the scope of this article's review. Not given here. |
| Volume production of 7-nanometer (2018), 5-nanometer (2020) and 3-nanometer FinFET (2022) | Sourced | Reference 3 https://www.tsmc.com/english/dedicatedFoundry/technology/logic |
| Release of N3A to customers at the end of 2025, and the roles of N2X, N3X and N4X | Sourced | Reference 1 https://www.sec.gov/Archives/edgar/data/1046179/000162828026025362/tsm-20251231.htm |
| R&D spending of NT$246.4 billion (6.5% of net revenue, +20.7%) and the main reason for the rise (research on 10-, 14- and 16-angstrom generations) | Sourced | Reference 1 https://www.sec.gov/Archives/edgar/data/1046179/000162828026025362/tsm-20251231.htm |
| Capex of NT$1,272.4 billion in 2025, the 2026 outlook of US$52 to 56 billion and its focus (2-nanometer and 3-nanometer capacity; Fabs 20, 21 and 22) | Sourced | The outlook is the company's plan as of April 2026 and is not yet confirmed. Reference 1 https://www.sec.gov/Archives/edgar/data/1046179/000162828026025362/tsm-20251231.htm |
| Board approval of about US$29.4 billion in capital appropriations in August 2026 | Sourced | Reference 8 https://pr.tsmc.com/english/news/3332 |
| Stakes in JASM (about 72.6%) and ESMC (70.0%), co-investors, and progress at the TSMC Arizona fabs | Sourced | Reference 1 https://www.sec.gov/Archives/edgar/data/1046179/000162828026025362/tsm-20251231.htm |
| Joint venture with Sony Semiconductor Solutions (up to ¥282 billion, Kumamoto, volume production expected in 2029, subject to approvals) | Sourced | The volume production date is a company expectation and not yet confirmed. Reference 9 https://pr.tsmc.com/english/news/3333 Reference 8 https://pr.tsmc.com/english/news/3332 |
| CHIPS Act direct funding of up to US$6.6 billion and loans of up to US$5 billion (November 2024), and up to €5 billion of state aid for ESMC (December 2024) | Sourced | Subsidies are conditional. The amounts actually received could not be confirmed. Reference 1 https://www.sec.gov/Archives/edgar/data/1046179/000162828026025362/tsm-20251231.htm |
| Names of external research consortia and universities, and individual tool makers | Not yet confirmed | No statement found within the scope of this article's review. |
| Customer concentration (top ten 78%, largest 19%, second 17%) | Sourced | Customers are not named. Reference 1 https://www.sec.gov/Archives/edgar/data/1046179/000162828026025362/tsm-20251231.htm |
| The initiative with ASML on large-format photomasks (12-inch, pilot line by 2031, exposure system readiness by 2033) and the intention to deploy High NA from 2030 | Sourced | Timing reflects the intentions of the companies and is not yet confirmed. Reference 10 https://pr.tsmc.com/english/news/3338 |
| Statements on tools and materials procurement (tools define the limits of the process, countries of origin of wafer suppliers, single-source materials) | Sourced | Reference 1 https://www.sec.gov/Archives/edgar/data/1046179/000162828026025362/tsm-20251231.htm |
| The stages of tariffs (April 2025 announcement, February 2026 Supreme Court ruling, Section 232 proclamation, January 2026 U.S.-Taiwan agreement) | Sourced | The company says details of the agreement remain unclear. Reference 1 https://www.sec.gov/Archives/edgar/data/1046179/000162828026025362/tsm-20251231.htm |
| Export controls (rules of October 2022, October 2023 and January 2025; expiry of the Nanjing VEU and the annual license) | Sourced | Reference 1 https://www.sec.gov/Archives/edgar/data/1046179/000162828026025362/tsm-20251231.htm |
| The readings that TSMC keeps renewing generations, moves to nanosheet and backside power, and puts yield at the center | Sourced | Reference 1 https://www.sec.gov/Archives/edgar/data/1046179/000162828026025362/tsm-20251231.htm Reference 3 https://www.tsmc.com/english/dedicatedFoundry/technology/logic Reference 2 https://www.tsmc.com/english/dedicatedFoundry/technology/logic/l_2nm |
| The reading that TSMC is trying to lead through the whole manufacturing system | Inference | This article's interpretation of the statements in the references. Reference 1 https://www.sec.gov/Archives/edgar/data/1046179/000162828026025362/tsm-20251231.htm Reference 10 https://pr.tsmc.com/english/news/3338 |
| The reading that wafer flatness and the purity of chemicals and gases bear directly on yield at the nanoscale | Inference | This article's own commentary. The references do not state it directly. Reference 1 https://www.sec.gov/Archives/edgar/data/1046179/000162828026025362/tsm-20251231.htm |
| The reading that advanced packaging is combined with transistor scaling | Inference | This article's interpretation of the statements in the references. Reference 1 https://www.sec.gov/Archives/edgar/data/1046179/000162828026025362/tsm-20251231.htm |
| TSMC's type (devices and displays) and the categories in Fig. 1 | Our calculation | This article's own arrangement. Company names are examples drawn from this series. |
Last updated 9 October 2026 / Troy Technical
Figures in this article come from TSMC's Form 20-F (its annual report for the year ended December 2025), official technology pages and official news releases. No research-firm estimates or press-based figures have been used. Passages marked "Inference" are this article's interpretation of primary sources, not statements made by the company. Company plans and outlooks (capex, volume production timing, new fabs, joint ventures) are unconfirmed forward-looking statements. Generation names such as "2 nm" are the company's labels and are not described as referring to a particular dimension. Descriptions of tariffs and export controls reflect the 20-F as of April 2026 and do not include later changes. This article is not investment advice.