Semiconductor Back-End– category –
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ASE to Raise Advanced Packaging Prices by Up to 20% by 2026 Amid Soaring AI Demand
AXTEK Technology Company Limited Taiwan Overview ASE Technology Holding, the world's largest OSAT provider, plans to increase its backend wafer packaging prices by 5-20% in 2026, driven by a surge in AI-powered semiconductor demand. With... -
Silicon Box Secures $77.5M to Scale Advanced Packaging and Chiplet Integration
DealStreetAsia Singapore Overview Singapore-based semiconductor packaging and chiplet integration startup, Silicon Box, has secured S$100 million (approximately US$77.5 million) in debt financing from a global consortium of institutional... -
Samsung to Establish Gwangju Advanced Packaging Facility, Eyes Full HBM Hybrid Bonding Transition by 2029
TrendForce South Korea Overview Samsung Electronics is reportedly considering a new advanced semiconductor packaging plant in Gwangju, South Korea, with investment plans potentially announced by June 2026. This strategic facility will fo... -
SK Hynix Boosts HBM4 Production with Major TC Bonder Order from Hanmi Semiconductor
The Korea Herald South Korea Overview SK Hynix has made a significant investment, ordering ₩44.2 billion (approx. $28.7 million USD) worth of advanced 'TC Bonder 4.5 Griffin' thermo-compression bonders from Hanmi Semiconductor. This stra... -
TSMC to Boost CoWoS Capacity Tenfold to 130K Wafers/Month by Late 2026, Accelerates Glass-Substrate CoPoS for AI Chips
Tom's Hardware USA Overview TSMC is aggressively expanding its advanced packaging capacity, projecting a tenfold increase in CoWoS production to over 130,000 wafers per month by the end of 2026 to meet surging AI demand. Despite this, de... -
Semiconductor Back-End Weekly Report May 7, 2026
📄 Weekly Report June 07, 2026 (PDF) — Download Weekly Report June 07, 2026 (PDF) — DownloadDownload 🎙 Podcast June 07, 2026 (MP3) — Play & Download Semiconductor_BackEndEnglishPodcast_20260607.mp3Download -
IEEE ECTC 2026 Program Reveals Latest Research in Advanced Packaging, Including 3D Integration, Hybrid Bonding, and New Substrate Materials
IEEE Electronic Components and Technology Conference (ECTC) USA Overview The program for the 76th IEEE Electronic Components and Technology Conference (ECTC) unveiled a wide array of cutting-edge research in advanced packaging, focusing ... -
Tsinghua University Develops 3D Chip Design Tool Tailored for Huawei’s ‘LogicFolding’ Architecture
Tom's Hardware China Overview Tsinghua University in China has developed a 3D chip design tool specifically tailored for Huawei’s 'LogicFolding' architecture. This tool aims to optimize chip performance and efficiency for AI and HPC appl... -
Singapore Semiconductor Testing Equipment Market Projected to Reach $310 Million by 2033, Growing at 7.8% CAGR
ABNewswire Singapore Overview This article provides an overview of a market research report on the Singapore semiconductor testing equipment market, distributed by ABNewswire. The report forecasts the market to reach $310 million by 2033... -
IEEE ECTC 2026 Highlights Packaging Technologies Redefining AI and HPC Scalability Limits
IEEE Electronic Components and Technology Conference (ECTC) USA Overview The 2026 IEEE Electronic Components and Technology Conference (ECTC) spotlighted packaging technologies redefining AI and HPC scalability limits. Intel Foundry's R&...
