Semiconductor Back-End– category –
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Semiconductor Back-End
NVIDIA’s AI Chip Supply Bottleneck Stems from TSMC’s Booked CoWoS Capacity, Intel EMIB Emerges as Alternative
BingX International Overview TSMC's CoWoS (Chip-on-Wafer-on-Substrate) advanced packaging capacity is fully booked through 2026, with 52-78 week lead times, posing a severe supply bottleneck for NVIDIA. While NVIDIA reportedly secures 60... -
Semiconductor Back-End
NVIDIA’s 2027 CoWoS Supply Forecast Raised 69% to 1.1 Million Interposers; AMD to See Over 50% Growth: KeyBanc Asia Supply Chain Checks Reveal Strong Demand
TipRanks USA Overview KeyBanc analyst John Vinh's Asia supply chain checks reveal strong, persistent demand across the semiconductor ecosystem. NVIDIA's 2027 CoWoS supply forecast for Rubin and Rubin Ultra was raised 69% to 1.1 million i... -
Semiconductor Back-End
TSMC and NVIDIA’s ‘Glass Killer’: How Glass Core Substrates Will Revolutionize AI Chips by 2028
SETN Taiwan Overview Renowned analyst Kuo Ming-Chi reveals TSMC's secretive development of 'glass core substrates' in collaboration with NVIDIA, poised to be a game-changer for next-generation AI chip manufacturing. This innovative techn... -
Semiconductor Back-End
Rapidus and Cadence Partner on Agentic AI for Advanced SoC Design, Driving System-Level Co-Optimization
Las Vegas Sun USA Overview Japan's Rapidus announced a partnership with Cadence to drive system-level co-optimization for Agentic AI-enabled advanced SoC (System-on-Chip) design. This collaboration emphasizes tight integration across sem... -
Semiconductor Back-End
AI-Driven Advanced Packaging Orders Surge, Widening ABF Carrier Board Supply-Demand Gap, Benefiting Industry with Both Volume and Price Increases
AlphaWire International Overview Nomura Securities reports the semiconductor packaging substrate industry is experiencing a strong AI-driven recovery, with global packaging substrate shipments up 36% year-on-year in June 2026. This growt... -
Semiconductor Back-End
Japan’s Rapidus Partners with IBM on 2nm Semiconductor Manufacturing to Bolster Indo-Pacific Supply Chain Resilience
Geopolitical Analysis / Think Tank International Overview Japan's Rapidus, in partnership with IBM, aims to establish 2nm advanced semiconductor manufacturing in Japan, strengthening the Indo-Pacific supply chain, including ASEAN countri... -
Semiconductor Back-End
TSMC Achieves Record Q2 Revenue of $40.2B with 67.7% Gross Margin, CoWoS Fully Booked Through 2026, and Maps 14-Reticle Packaging
LongYield - Substack International Overview TSMC reported record Q2 2026 consolidated revenue of $40.20 billion and a gross margin of 67.7%, driven by robust AI chip demand and leading-edge nodes (7nm and below accounting for 77% of wafe... -
Semiconductor Back-End
TSMC’s N3 Node and Expanding CoWoS Capacity Solidify Nvidia’s Future, While HBM4 Multi-Vendor Qualification Reduces Supply Risk
Seeking Alpha USA Overview TSMC and ASML's raised guidance confirms persistent AI infrastructure demand-supply imbalance. TSMC's N3 node, utilized for Nvidia's Rubin GPUs, is fully booked, and CoWoS advanced packaging capacity is expandi... -
Semiconductor Back-End
TSMC Leads in Data Center Co-Packaged Optics, While Samsung Pursues Future AI Packaging with HBM, Logic, and SiPh Integration in ‘2.xD’ Technology
KuCoin International Overview TSMC leads the data center co-packaged optics (CPO) switch market, with Broadcom and NVIDIA already sampling or shipping CPO switches based on TSMC's technology. Concurrently, Samsung is developing '2.xD' ad... -
Semiconductor Back-End
TSMC’s CoWoS Supply to Reach At Least 200K Wafers Monthly by 2027, Accelerating Expansion to Meet Soaring AI Demand
DigiTimes Taiwan Overview TSMC is accelerating its CoWoS (Chip-on-Wafer-on-Substrate) advanced packaging capacity expansion to meet robust AI chip demand, with market indications suggesting monthly output will reach at least 200,000 wafe...