Key Findings
Powertech Technology (PTI) has officially approved a joint venture with Broadcom in Singapore, committing a $400 million investment (approximately 62 billion JPY) to establish Fan-Out Panel-Level Packaging (FOPLP) manufacturing capabilities. This significant capital outlay represents a strategic partnership designed to meet the surging demand for Artificial Intelligence (AI) Application-Specific Integrated Circuits (ASICs) efficiently and effectively.
Technical & Manufacturing Details
FOPLP is an advanced packaging technology that enhances production efficiency and cost-effectiveness by utilizing larger panels compared to traditional wafer-level packaging. High-performance and high-density chips, such as AI ASICs, tend to have larger packaging footprints due to the integration of chiplets and high-bandwidth memory (HBM). FOPLP is crucial for accommodating these increased dimensions while enabling finer line widths and superior electrical characteristics, which are essential for advanced AI applications.
Through this joint venture, PTI will prioritize Redistribution Layer (RDL) technology for advanced packaging substrates. RDL technology involves re-routing the wiring from the chip’s I/O pads to external connection pads, thereby improving signal transmission performance through miniaturized circuit patterns. The company plans to install equipment at its Hsinchu factory in Taiwan this year, targeting a monthly production capacity of 3,000 panels (510mm x 510mm). This constitutes the initial phase of a broader capacity expansion project.
- **FOPLP Technology:** Utilizes large-area panels to boost production throughput and reduce costs.
- **RDL Technology Enhancement:** Optimizes electrical performance and signal integrity for AI ASICs through fine-line wiring.
- **Initial Capacity:** Secures 3,000 panels/month (510mm x 510mm) FOPLP production capacity at Hsinchu factory.
Background & Context
The rapid evolution of AI technology is driving a profound transformation across the semiconductor industry, marked by an explosive increase in demand for AI-specific ASICs. These AI ASICs necessitate extremely high computational power and data processing speeds, making cutting-edge packaging technologies indispensable. With existing advanced packaging solutions like TSMC’s CoWoS facing tight supply, FOPLP is gaining importance as a viable alternative. The collaboration with a major semiconductor company like Broadcom validates FOPLP technology’s market maturity and its strategic value within the AI ASIC supply chain.
Strategic Significance & Outlook
The FOPLP joint venture between Powertech Technology and Broadcom in Singapore is expected to stabilize the supply of advanced packaging solutions for the AI ASIC market and enhance competitive capabilities. This investment is a significant milestone for PTI in establishing itself as a key player in the AI chip packaging market. Following initial capacity expansion, further investments and technological innovations are anticipated, positioning FOPLP technology to become one of the mainstream methods for high-performance semiconductor manufacturing in the AI era. This will contribute to enhancing AI chip performance and cost-efficiency, accelerating the widespread adoption of AI technologies.
Source: https://www.digitimes.com/news/a20260717PD222/foplp-broadcom-packaging-powertech-ai-asic.html
Get our weekly technology intelligence — free
Receive an infographic that lets you judge at a glance whether each field’s analysis report is worth reading.
Subscribe Free — Weekly Tech Intelligence
By subscribing, you’ll receive Troy-Technical’s weekly technology intelligence newsletter.
- Your email and selected fields are used only to deliver the newsletter.
- We never share your information with third parties.
- You can unsubscribe anytime via the link in each email.
See our Privacy Policy for details.
Takes about a minute · Unsubscribe anytime
Comments