Key Findings
A recent article from P Equity Research analyzes the evolution of advanced semiconductor packaging technologies, including 2.5D and CoWoS (Chip-on-Wafer-on-Substrate) architectures. It elucidates the critical role of adhesive and encapsulant materials when processor and memory layers are mounted on interposers. The article emphasizes that underfill in flip-chip bonding functions as a cushioning material for bumps against thermal cycling, and epoxy mold compounds are crucial for encapsulating assemblies to protect them from environmental elements.
Technical / Clinical Details
At the core of advanced packaging technologies lies the efficient and high-density integration of multiple chips. The article primarily focuses on the following technologies and the roles of their adhesive and encapsulant materials:
- 2.5D and CoWoS Architectures: This configuration involves horizontally placing multiple dies, such as processors and HBM (High Bandwidth Memory), on a silicon interposer. This interposer enables high-speed, high-density electrical connections between chips. Adhesives and encapsulants play a vital role in mechanically securing this complex structure and providing thermal and environmental protection.
- Role of Underfill in Flip-Chip Bonding: In flip-chip bonding, chips are directly connected to the substrate via solder bumps. Due to the Coefficient of Thermal Expansion (CTE) mismatch between the chip and the substrate, stress concentrates on the bumps during thermal cycling. Underfill fills the microscopic gaps between these bumps, absorbing and dispersing stress to significantly improve the reliability and lifespan of solder joints. The article describes this as acting as a “cushioning material for bumps” against thermal cycling.
- Role of Epoxy Mold Compounds (EMC): While underfill provides protection around the bumps, EMC encapsulates the entire package, protecting the delicate internal components from external environmental threats such as moisture, chemicals, and mechanical shock.
- Thermal Compression Bonding (TCB): A technology that achieves fine bump pitches for connections in high-layer stacks like HBM. It enhances process efficiency and reliability by simultaneously introducing underfill.
- Hybrid Bonding: The latest technology enabling 3D stacking, achieving direct copper-to-copper connections between chips. This technology can eliminate the need for underfill materials, further improving connection density and performance.
These materials and processes are indispensable for optimizing the performance, reliability, and manufacturing yield of next-generation semiconductors.
Background & Context
Technological innovations in AI, HPC, 5G/6G, and other fields demand unprecedented levels of performance and integration density from semiconductor chips. As the limits of Moore’s Law become apparent, advanced packaging has emerged as a solution. Specifically, 2.5D and 3D packaging, when combined with chiplet technology, are key to achieving system-level performance improvements and miniaturization. In such complex structures, material selection and process control are paramount in determining the quality and reliability of the final product.
Strategic Significance & Outlook
The role of adhesives and encapsulants analyzed by P Equity Research will only grow in importance for the further performance enhancement of AI accelerators and HBM, as well as the realization of more complex chiplet integration. The emergence of new technologies like hybrid bonding may also bring changes to the roles of underfill and EMC, requiring material manufacturers to continue research and development to meet these evolving requirements. These technological innovations are expected to serve as a foundation for accelerating innovation across a wide range of future fields, including data centers, autonomous vehicles, and consumer electronics.
Source: https://pequityresearch.substack.com/p/know-your-substrate-part-2-decoding
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