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Racyics UCIe PHY IP: GlobalFoundries 22FDX silicon validation

Chiplet Marketplace Germany
Overview
Racyics announced the successful silicon validation of its Universal Chiplet Interconnect Express (UCIe) PHY IP for GlobalFoundries’ 22FDX process. UCIe provides a common interface for efficiently connecting diverse chiplets, significantly enhancing system scalability and flexibility. This Racyics PHY IP offers an energy-efficient solution for physical layer communication between chiplets, poised to contribute to the evolution of consumer and automotive applications.
In Depth

Key Findings

Racyics has announced the successful silicon validation of its Universal Chiplet Interconnect Express (UCIe) PHY IP, developed using GlobalFoundries’ 22FDX process. This achievement marks a significant milestone in advancing interoperability and integration within the burgeoning chiplet ecosystem.

Technical / Clinical Details

Universal Chiplet Interconnect Express (UCIe) is an open industry-standard interface designed to seamlessly connect chiplets manufactured by different vendors or across various process nodes. This standard defines the physical (PHY), data link, and transaction layers, enabling high-bandwidth, low-latency, and power-efficient die-to-die communication. Racyics’ validated UCIe PHY IP implements the physical layer of the UCIe specification, leveraging GlobalFoundries’ 22FDX process technology. The 22FDX process is known for its ability to balance low power consumption with high integration density. The combination of this IP with 22FDX offers an energy-efficient interconnect solution for chiplets, facilitating integration and accelerating product development in diverse applications, particularly in power-sensitive areas like consumer electronics and automotive Systems-on-Chip (SoCs).

Background & Context

The semiconductor industry faces a dual challenge: the slowing pace of Moore’s Law and the increasing demand for specialized, high-performance chips across various applications. Chiplet technology has emerged as a compelling solution, improving design flexibility, cost-efficiency, and performance by integrating multiple smaller chips (chiplets) into a single package. However, the lack of a standardized communication protocol between chiplets has been a significant barrier to its widespread adoption. UCIe was developed by leading companies, including Intel, AMD, ARM, Qualcomm, and Samsung, to address this challenge, accelerating the maturity of the chiplet ecosystem. Racyics’ latest achievement indicates that the implementation of the UCIe standard is progressing, moving towards commercially viable and applicable technologies.

Strategic Significance & Outlook

The silicon validation of Racyics’ UCIe PHY IP for the GlobalFoundries 22FDX process will further propel the commercialization of chiplet technology. The availability of this IP empowers semiconductor designers to develop more complex, high-performance, and cost-effective chiplet-based systems more rapidly. Adoption of chiplets is expected to accelerate across a wide range of sectors, including AI accelerators, HPC, data centers, and edge AI devices. The proliferation of the UCIe standard and the emergence of diverse solutions from IP vendors will fundamentally transform semiconductor design, ushering in a new wave of innovation. This technology is anticipated to become a crucial foundation for the development of future high-performance, low-power devices.

Source: https://chiplet-marketplace.com/insights/news/racyics-ucie-phy-ip-globalfoundries-22fdx

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