TrendForce Forecasts TSMC PIC Capacity to Soar to 25K Wafers/Month by 2028, with NVIDIA and Broadcom as Early COUPE Customers

July 12, 2026

TrendForce Taiwan

Overview

TrendForce projects TSMC’s Photonic Integrated Circuit (PIC) wafer production capacity will surge to 25,000 wafers per month by 2028, a critical step for mass production of Co-Packaged Optics (CPO). NVIDIA and Broadcom are expected to be early adopters of TSMC’s COUPE platform, addressing the escalating demand for high-speed optical interconnects in data center and AI infrastructure. This capacity expansion will significantly influence the semiconductor supply chain and technology roadmap for the coming AI era.

In Depth

Key Findings

Market research firm TrendForce has predicted that TSMC, the world’s largest foundry, is set to significantly expand its wafer production capacity for Photonic Integrated Circuits (PICs) to 25,000 wafers per month by 2028. This strategic move is intended to accelerate the mass production readiness of Co-Packaged Optics (CPO) for AI and high-performance computing (HPC) applications. NVIDIA and Broadcom are strongly anticipated to be initial customers for TSMC’s COUPE platform.

Technical Details

TSMC’s projected increase to 25,000 PIC wafers per month represents a monumental jump from current production levels, signifying a crucial infrastructure investment to meet the explosive demand for optical interconnects in data centers and AI systems. CPO technology involves integrating optical transceivers directly into the same package as host chips like CPUs or GPUs, which offers substantial benefits over traditional pluggable optical modules. These benefits include reduced power consumption, increased bandwidth density, and lower signal latency. TSMC’s COUPE (Co-Uniting Optics and Electronic) platform is the foundational technology enabling such advanced optoelectronic integration, combining silicon photonics with cutting-edge packaging techniques. NVIDIA and Broadcom, as leaders in AI accelerators and network switches, are keen to integrate CPO technology into their next-generation products to maximize performance and energy efficiency.

Background & Context

As AI models grow in size and complexity, the immense volume of data movement between chips within data centers has become a significant bottleneck, also contributing to escalating power consumption. Traditional electrical signaling is increasingly unable to cope with these challenges, making the transition to optical interconnects, particularly CPO, an imperative. The substantial capacity expansion by a major foundry like TSMC is critical for moving CPO technology from the research and development phase to mass production, establishing its status as a core infrastructure technology for the AI era. This move is expected to further accelerate the growth of the overall AI semiconductor market.

Strategic Significance & Outlook

TSMC’s PIC capacity expansion will have a profound positive impact across the entire CPO supply chain, creating new business opportunities for related materials, equipment, and testing companies. The adoption of the COUPE platform by NVIDIA and Broadcom will encourage other AI accelerator and network device manufacturers to integrate CPO technology, driving industry-wide standardization and ecosystem development. The target of 25,000 wafers per month by 2028 signals a strong commitment to a future where optical communication technology is fully integrated into the heart of AI infrastructure.

Source: https://www.trendforce.com/news/2026/07/08/news-tsmc-pic-capacity-seen-surging-to-25k-wafersmonth-by-2028-nvidia-broadcom-eyed-as-early-coupe-customers/

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