Key Findings
NVIDIA has invested in Cambridge-based startup Riverlane as part of a broader $250 million UK computing commitment. This strategic minority equity stake aligns NVIDIA with Riverlane’s Deltaflow QEC physical decoder stack. The partnership has already demonstrated a significant performance leap in QEC decoder recalibration workflows by integrating NVIDIA H100 GPUs.
Technical Details
The collaboration focused on adapting Riverlane’s Local Clustering Decoder (LCD) for high-throughput GPU parallel processing. The results show a drastic increase in processing speed and throughput:
- Processing Speed: A surface code training cycle was reduced from 3 minutes (single CPU core) to 2.8 seconds.
- Throughput: The H100 GPU processed over 4 million surface code error syndromes per second, compared to approximately 59,000 on a CPU.
This acceleration allows for routine, pre-experiment decoder recalibration to address hardware defects and dynamic qubit drift.
Background & Context
Scaling fault-tolerant quantum computing (FTQC) is currently hindered by hardware instability, including shifting qubit frequencies and fluctuating two-qubit gate fidelities. Standard QEC decoders rely on pre-computed error likelihood weights; however, these weights become inaccurate as physical qubit behavior drifts, which subsequently degrades logical qubit fidelities.
Significance & Outlook
By using NVIDIA GPUs to process large batches of experimental syndrome data in parallel, Riverlane’s AI-driven calibration loop updates the decoder’s physical noise model in real time without requiring manual tuning. This creates a tightly coupled QPU-GPU control loop where classical GPU acceleration continuously recalibrates low-latency hardware decoders, such as Riverlane’s ASIC/FPGA matrix chips. This integration establishes a technical foundation for the development of reliable, multi-modal utility-scale quantum systems.
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