Semiconductor Back-End– category –
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Intel to Build $3.3 Billion Glass Core Substrate Manufacturing Facility in India to Bolster Advanced Packaging Supply
TrendForce USA Overview Intel, in collaboration with 3D Glass Solutions (3DGS), is progressing with plans to invest approximately $3.3 billion in an advanced packaging glass core substrate manufacturing facility in Odisha, India. The pla... -
Samsung Electronics Begins Shipment of Industry’s First 12-Layer HBM4E Samples, Improving Energy Efficiency by 16% and Thermal Resistance by 14% Over HBM4
Samsung Electronics South Korea Overview Samsung Electronics has commenced shipments of industry-first 12-layer HBM4E samples to key global customers. This HBM4E improves energy efficiency by 16% and thermal resistance by over 14% compar... -
Imec and EV Group Set New World Record for 3D Chip Stacking Precision with Sub-40nm Wafer Bond Overlay
PR Newswire ベルギー Overview Imec and EV Group have achieved a world-record post-bond overlay accuracy of less than 40 nanometers across a 300mm wafer for 200nm pitch hybrid bonding, a crucial advancement for next-generation 3D ICs. Dem... -
TSMC CoWoS Capacity Becomes Major AI Chip Growth Bottleneck: Ramping to 120K Wafers/Month by late 2026 Still Falls Short of Demand
backplane Taiwan Overview TSMC's CoWoS packaging capacity is identified as the most critical bottleneck hindering AI chip evolution. While TSMC plans to quadruple its CoWoS production capacity from approximately 35,000 wafers/month in la... -
KLA’s Advanced Packaging Business Soars, Projecting Over $1.3B Revenue in FY2026 Driven by AI Inspection Demand
Bitget USA Overview KLA Corporation, a global leader in semiconductor process control and yield management, is experiencing rapid growth in its advanced packaging business, driven by the increasing complexity of AI chips. Revenue from th... -
ASMPT Establishes Advanced Packaging Technology Advisory Council to Accelerate AI-Era Innovation
ASMPT Singapore Overview ASMPT has established an Advanced Packaging Technology Advisory Council (TAC) to address the growing importance of advanced packaging for next-generation computing and AI components. The TAC will focus on a broad... -
Semiconductor Back-End Weekly Report May 31, 2026
📄 Weekly Report May 31, 2026 (PDF) — Download Weekly Report May 31, 2026 (PDF) — DownloadDownload 🎙 Podcast May 31, 2026 (MP3) — Play & Download Semiconductor_BackEndEnglishPodcast_20260531.mp3Download -
AMD Explores Powertech’s FOPLP for Next-Generation Zen 7 CPUs, Eyeing Packaging Diversification
TechPowerUp USA Overview AMD is reportedly exploring Powertech Technology's Fan-Out Panel-Level Packaging (FOPLP) for its upcoming "Zen 7" CPUs, codenamed "Grimlock." This move signals AMD's strategic intent to build increasingly complex... -
Korea Addresses HBM Test Equipment Bottleneck by Fostering Domestic Suppliers
eferix.substack.com South Korea Overview South Korea has identified the HBM test equipment bottleneck, historically dominated by foreign companies like Advantest and Teradyne, as a national supply chain vulnerability. In response, SK Hyn... -
Huawei’s “Tao Law” Proposes 1.4nm-Equivalent Chip Density via Logic Folding and Ultra-Fine Hybrid Bonding
China as a System China Overview Huawei has introduced the "Tao Law," a novel semiconductor process development aiming for 1.4nm-equivalent chip density within five years through "Logic Folding." This method distributes logic gates acros...
