TSMC Significantly Expands CoWoS Advanced Packaging Capacity, to Begin Production of 14-Reticle-Size Packages by 2028 for Surging AI Demand

July 12, 2026

Biya Global Limited Taiwan

Overview

TSMC is substantially expanding its CoWoS (Chip-on-Wafer-on-Substrate) advanced packaging capacity to meet the surging demand for AI chips. The company aims to nearly quadruple CoWoS capacity to 130,000 wafers per month by the end of 2026 and plans to commence production of 14-reticle-size CoWoS packages by 2028, capable of integrating approximately 10 large compute dies and 20 HBM stacks. This expansion reflects the growing importance of packaging and system integration in determining AI chip value, beyond process node miniaturization.

In Depth

Key Findings

TSMC is significantly boosting its CoWoS (Chip-on-Wafer-on-Substrate) advanced packaging capacity, a critical differentiator for the company in response to the explosive demand for AI chips. The company aims to nearly quadruple its CoWoS capacity to 130,000 wafers per month by the end of 2026, yet supply is still projected to lag demand through 2027. Notably, TSMC plans to initiate production of an unprecedented 14-reticle-size CoWoS package by 2028, capable of integrating approximately 10 large compute dies and 20 HBM (High-Bandwidth Memory) stacks, driving the next wave of AI chip performance enhancement.

Technical / Clinical Details

CoWoS technology enables the integration of multiple logic dies and HBM stacks onto a silicon interposer, which is then connected to an organic substrate, achieving ultra-high-speed and energy-efficient data transfer. This technology is indispensable for cutting-edge AI accelerators like Nvidia’s Blackwell and AMD’s MI300X. TSMC is extending its CoWoS technology to support larger and more complex packages. The planned 14-reticle-size CoWoS package for 2028 is roughly twice the size of existing CoWoS packages, offering significantly higher integration density and processing power. This large-scale package addresses the growing demands for computational power and memory bandwidth driven by increasingly complex AI models, requiring extremely fine bump pitches and high-precision alignment for inter-chiplet connections. Beyond its current wafer-based CoWoS, TSMC is also developing CoPoS (Chip-on-Panel-on-Substrate), which utilizes square panels instead of round wafers, aiming for further cost efficiency and larger integration scales.

Background & Context

The evolution of AI has shifted the semiconductor manufacturing bottleneck from traditional wafer fabrication to advanced packaging. HBM and CoWoS, in particular, have become crucial determinants of AI chip supply. TSMC holds a dominant market share in CoWoS, with its capacity fully booked by major clients, including Nvidia, which consumes approximately 60% of the allocation. This situation highlights that the value of AI chips is increasingly derived not just from smaller process nodes, but significantly from packaging technology that efficiently integrates multiple components for high performance. Amid efforts to strengthen the U.S. semiconductor supply chain, TSMC is planning two advanced packaging plants in Arizona and has forged a 10-year strategic alliance with Amkor Technology to bolster CoWoS and 3D-IC capabilities within the U.S. These investments are essential steps to ensure a stable supply for global AI infrastructure.

Strategic Significance & Outlook

TSMC’s substantial CoWoS capacity expansion is critically important for sustaining the growth of the AI industry. However, given that demand continues to outpace supply expansion, CoWoS is expected to remain a primary bottleneck for AI chips. This scenario creates significant business opportunities for advanced packaging equipment suppliers such as Applied Materials, BESI, Disco, and Tokyo Electron. Concurrently, the development of alternative packaging technologies like Intel’s EMIB-T and Samsung’s HCB is accelerating, indicating intensifying market competition. In the coming years, the technological evolution and capacity expansion of CoWoS will profoundly impact AI chip pricing, supply stability, and the ultimate proliferation of AI solutions. TSMC’s CoWoS technology and investment strategy will undoubtedly be a key factor shaping the direction of the global AI industry for years to come.

Source: https://vertexaisearch.cloud.google.com/grounding-api-redirect/AUZIYQFCV0ie60v4vvYgoStu9YC6By4q8LfllHhBrPUli-8ZPhPEjo3s3FZhYvPnc4rHNetrg4luf6M18HgAgrGPBtIHg0LwikuxOOfc4t3eZRKU_Mt4ihwH0SoHBV6BLN8GeBcAqXjLmbUVaZdpRfZNm6Zm5STYgtYfblnAySIg8R7K7teGtNrVVijieEfEyL-5e5qbastd7WxVtcg==

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