Key Findings
Onto Innovation has unveiled a groundbreaking high-precision metrology solution poised to significantly advance the mass production of Panel Level Packaging (PLP), a highly anticipated next-generation semiconductor packaging technology. PLP offers the potential for substantial manufacturing cost reductions by simultaneously packaging numerous chips on larger panels compared to traditional wafer-level packaging (WLP). However, the increased panel size has historically presented challenges in process control. Onto Innovation’s new technology aims to overcome these PLP manufacturing hurdles, particularly the difficulty in managing dimensional accuracy and detecting defects in fine structures on large substrates. This is expected to improve PLP yield and reliability, further enhancing cost efficiency and accelerating the widespread adoption of PLP for semiconductors in smartphones, wearable devices, and IoT devices across diverse applications.
Technical and Solution Details
The metrology solution announced by Onto Innovation boasts the following key technical features:
- High-Speed Scanning for Large Panels: Combines high-resolution imaging with high-speed stage control to rapidly scan the entire surface of large panels, up to 600mm x 600mm, enabling comprehensive data acquisition.
- High-Precision Measurement of Fine Structures: Provides highly accurate, non-contact measurement of sub-micron level fine wiring, bumps, vias, and RDLs (Redistribution Layers).
- AI-Powered Defect Detection and Classification: Incorporates machine learning algorithms to automatically identify and classify defect patterns from vast amounts of measurement data. This reduces false positives, improving inspection efficiency and accuracy.
- Real-Time Feedback for Process Control: Acquired measurement data is analyzed in real-time and immediately fed back into the manufacturing process for parameter adjustments and process improvements. This enables early detection of process drift and supports continuous yield optimization.
This solution is particularly effective in addressing common PLP challenges such as wafer warpage, pattern misalignment, and foreign material contamination.
Background and Industry Context
PLP is attracting significant attention as a promising approach for low-cost, high-volume production of advanced packaging technologies such as flip-chip, fan-out, and SiP (System-in-Package). Especially with the miniaturization and multi-functionality of mobile devices and IoT equipment, packaging cost efficiency directly impacts product competitiveness. However, achieving uniform process control on large substrates has been a significant technical challenge and a barrier to mass production until now. Onto Innovation’s announcement reduces this barrier, paving the way for the widespread adoption of PLP.
Strategic Significance and Outlook
As a leading company in PLP metrology technology, Onto Innovation plans to continue its technological innovation, adapting to more complex package structures and new materials. This solution will be an indispensable tool for semiconductor manufacturers and OSATs (Outsourced Semiconductor Assembly and Test providers) to enhance PLP competitiveness and create new market opportunities. In the long term, the proliferation of PLP is expected to enable both cost reduction and performance improvement in semiconductor devices, contributing to a society where high-performance semiconductors are utilized in an even broader range of applications.
Source: #
Get our weekly technology intelligence — free
Receive an infographic that lets you judge at a glance whether each field’s analysis report is worth reading.
Subscribe Free — Weekly Tech Intelligence
By subscribing, you’ll receive Troy-Technical’s weekly technology intelligence newsletter.
- Your email and selected fields are used only to deliver the newsletter.
- We never share your information with third parties.
- You can unsubscribe anytime via the link in each email.
See our Privacy Policy for details.
Takes about a minute · Unsubscribe anytime
Comments