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TSMC to Double CoWoS Advanced Packaging Capacity to 260,000 Wafers/Month by 2028, Driving OSAT and Intel Orders Amid Supply Crunch

BigGo Finance Taiwan
Overview
TSMC plans to double its CoWoS advanced packaging capacity from 130,000 wafers/month to 260,000 wafers/month by the end of 2028, primarily driven by surging AI chip demand. This expansion, centered on its AP7 facility in Taiwan and the Arizona plant, aims to alleviate bottlenecks. The persistent demand exceeding TSMC’s supply has led to spillover orders for OSAT providers like ASE and Amkor, while Intel positions its EMIB-T technology to capture custom AI chip packaging, targeting 40,000-45,000 wafer-equivalent capacity by 2028.
In Depth

Key Findings

TSMC, the world’s leading contract chipmaker, has announced ambitious plans to double its CoWoS (Chip-on-Wafer-on-Substrate) advanced packaging capacity to 260,000 wafers per month by the end of 2028. This significant expansion, up from an estimated 130,000 wafers per month at the end of 2026, is a direct response to the unprecedented demand for AI chips and high-performance computing (HPC).

Technical / Clinical Details

CoWoS is a crucial 3D stacking technology that integrates multiple chips, such as GPUs and High Bandwidth Memory (HBM), onto a single package, enabling the high-density and high-performance requirements of modern AI accelerators. The expansion will primarily leverage TSMC’s AP7 facility in Taiwan and its upcoming Arizona plant in the United States. Due to TSMC’s existing supply constraints, the robust AI chip demand is funneling orders to Outsourced Semiconductor Assembly and Test (OSAT) providers including ASE Technology Holding, Amkor Technology, United Microelectronics Corp (UMC), and Vanguard International Semiconductor Corp (VISC), who are also expanding their advanced packaging capabilities. Intel is aggressively entering the custom AI chip packaging market with its EMIB-T (Embedded Multi-die Interconnect Bridge – Tiled) technology, projected to reach a capacity equivalent to 40,000-45,000 wafers per month by 2028. This positions Intel as a key player for custom AI accelerators, particularly for hyperscalers like Google and Amazon, with MediaTek also reportedly praising EMIB packaging as “very good.”

Background & Context

The explosive growth of the AI market has created a structural shortage in the semiconductor supply chain, with advanced packaging — specifically CoWoS and HBM — identified as a primary bottleneck. The current CoWoS supply-demand gap is estimated at around 20%, with projections suggesting it could exceed 30% by 2027. NVIDIA CEO Jensen Huang has consistently highlighted advanced packaging, HBM, and interconnects as critical supply chain constraints. TSMC’s massive investment reflects the industry’s collective effort to ramp up capacity for these indispensable components, which are foundational to the ongoing AI infrastructure buildout. This dynamic also underscores the strategic importance of HBM, with estimates suggesting four companies (Nvidia, Google, AMD, Amazon) consumed approximately 90% of the global HBM supply in 2025.

Strategic Significance & Outlook

The strategic capacity ramp-up by TSMC, complemented by OSAT providers and Intel, is vital for sustaining the rapid advancement and deployment of AI technologies. This expansion not only addresses immediate supply shortfalls but also paves the way for future innovations in chip design and integration. As the industry moves towards next-generation packaging solutions, such as glass substrates, the ability to scale high-volume advanced packaging will differentiate market leaders. The alleviation of these bottlenecks is expected to accelerate the introduction of more sophisticated AI chips, further fueling growth across the semiconductor ecosystem and AI-driven industries globally.

Source: https://finance.biggo.com/news/adcec901-53b3-453f-bf00-8373ebb1bb97

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