September 2026– date –
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Silicon Solar Cells: University of Surrey’s 90% cost reduction
Surrey University / AlphaGalileo UK Overview A review published in Acta Astronautica by University of Surrey researchers suggests that transitioning to modern silicon solar cells could cut satellite power supply costs by up to 90% and ha... -
NASA X-ray Imaging: AI heat shield degradation specs
Berkeley Lab News Center / sciencesprings USA Overview Lawrence Berkeley National Laboratory scientists, in a decade-long partnership with NASA, have developed a groundbreaking technique combining X-ray imaging and AI to observe in real-... -
Google AI Chips: SpaceX Transporter-18 orbital test explained
The Information (Superpower Daily) USA Overview Google is launching Project Suncatcher's prototype satellite aboard SpaceX's Transporter-18 mission to test the functionality of its AI chips in the space environment. The primary objective... -
Callisto: DLR’s reusable rocket nose cone and 2027 timeline
Parabolic Arc Germany Overview The German Aerospace Center (DLR) has finalized testing for the nose cone of its Callisto reusable rocket demonstrator and is preparing hardware transfer to France for final integration ahead of initial hop... -
TUSK IC: CMOS beamformer chips and €15M funding roadmap
IO+ Belgium Overview TUSK IC, a spin-out from KU Leuven, has secured €15 million in Series A funding to accelerate the commercialization of its standard CMOS beamformer chips for Ka-band satellite communications. This innovative technolo... -
Zhuque-3: LandSpace’s first controlled landing and specs
South China Morning Post China Overview Chinese commercial space companies are making steady progress in rocket reusability technology to match SpaceX. Notably, LandSpace successfully achieved China's first controlled ground landing of a... -
Huawei Kirin 9050 Pro: 4.3GHz clock and 2030 timeline
Invest Lingo China Overview Huawei's Kirin 9050 Pro chip shipped utilizing ultra-fine pitch hybrid bonding technology at 1.5 micrometers. This "logic folding technology" directly bonds two chips face-to-face, allowing them to function as... -
Rapidus 2nm: AI-driven custom chip manufacturing roadmap
Excite Japan Overview Japan's 2nm short Turnaround Time (TAT) semiconductor manufacturing market is being shaped by Rapidus's unique model. The Rapidus 2nm program integrates advanced Gate-All-Around (GAA) technology, single-wafer proces... -
Hybrid Bonding: Imec and EV Group 200nm demo explained
Tara Minunilor Belgium Overview Hybrid bonding, a semiconductor integration technology, directly connects dies or wafers with copper, bypassing traditional solder microbumps. Imec and EV Group demonstrated 200nm copper interconnect pitch... -
SK Hynix Hybrid Bonding: 90% yield and 3-year lifespan specs
The Economy South Korea Overview SK Hynix has stipulated stringent quality requirements for adopting hybrid bonding, a core technology for next-generation HBM manufacturing. The company demands a yield rate between 90% and 98% and a prod...
