Key Findings
Intel has integrated InP-based laser technology into its 300mm silicon photonics manufacturing platform to enable high-volume production. This move targets the growing demand for high-bandwidth optical interconnects in AI and high-performance computing (HPC), specifically supporting NPO and CPO architectures.
Technical Details
Traditional InP substrates are typically limited to 150mm (6-inch) wafers, with 3-inch and 4-inch formats remaining common. InP crystals are characterized by brittleness, slow growth, and defect-control challenges, which historically limited laser chip output per wafer. By utilizing a 300mm platform—the standard for silicon-based CMOS manufacturing—Intel aims to improve production efficiency and scalability.
Industry Landscape and CPO Commercialization
Several major players are advancing CPO commercialization:
- NVIDIA: Shipping Spectrum-X CPO switches to select partners using TSMC’s Compact Universal Photonic Engine (COUPE) technology.
- Broadcom: Shipping limited quantities of 51.2 Tb/s Bailly CPO switches and showcasing the third-generation Tomahawk 6-Davisson CPO switch, which offers 102.4 Tb/s capacity and 200 Gbps per channel.
- TSMC: Planning production of its COUPE-on-substrate solution in 2026, targeting a tenfold reduction in latency and twice the power efficiency of board-level pluggable optics.
- Chinese Suppliers: Zhongji Innolight has started small-volume production of 800G CPO optical modules, with shipments potentially beginning in 2027. Huawei introduced the NPO-based Ascend 960 supernode in September 2026.
Significance and Outlook
Despite manufacturing advances, testing remains a primary bottleneck for mass production. While optical alignment now takes seconds or less, testing a single photonic integrated circuit (PIC) can exceed 100 seconds. TrendForce identifies 2027 as the pivotal year for integrating CPO testing systems, with 2028 serving as the critical period for assessing large-scale production readiness.
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