imec– tag –
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Semiconductor Back-End
imec Breaks New Ground: III-V Chiplets on RF Silicon Interposer Achieve 100x Capacitance Density Boost and Sub-600nm Precision
OriginBrief ベルギー Overview imec has announced a significant breakthrough in heterogeneous integration, successfully integrating III-V chiplets onto a 300mm RF silicon interposer platform. This achievement delivers a 10-100x increase i... -
Semiconductor Back-End
TSMC Accelerates CoPoS Packaging Development, Standardizing 310x310mm Panel Format; Introduces Glass Core Substrate for CoWoS Towards Late 2028 Mass Production
TrendForce Taiwan Overview TSMC is accelerating the development of its CoPoS (Chip-on-Panel-on-Substrate) packaging architecture, standardizing a 310x310mm panel format, with pilot production targeted for 2027 and mass production in late... -
Semiconductor Back-End
imec Unleashes High-Density MIMCAP RF Interposer for D-Band Millimeter-Wave and Sub-THz Communications, Accelerating III-V Chiplet Integration
imec ベルギー Overview imec has unveiled a high-density MIMCAP RF interposer specifically engineered for demanding D-band and sub-THz wireless front-ends, alongside hundreds of gigahertz data center links. This innovative platform priori... -
Semiconductor Back-End
Park Systems and imec Forge Alliance for Next-Gen 3D Packaging and Logic Metrology
imec Official Press Release ベルギー Overview Nano-metrology leader Park Systems has launched a two-year Joint Development Program (JDP) with imec, a global semiconductor research powerhouse. The partnership focuses on creating cutting-e... -
New Technology
EVG Unlocks 200nm Hybrid Bonding with Sub-40nm Overlay; Forges Quantum Tech Partnership with SAL
Distill Intelligence オーストリア Overview EV Group (EVG) has announced a major technical breakthrough in wafer-to-wafer hybrid bonding, achieving a 200nm pitch with an impressive sub-40nm overlay accuracy, developed in collaboration wit... -
New Technology
IMEC, ASML, TSMC Scale 2D Material Transistors to 300mm Wafers, Achieving 50nm Contact Poly Pitch for Fab Integration
IMEC ベルギー Overview IMEC, in partnership with ASML and TSMC, has unveiled a robust, scalable 300mm integrated process for n-type and p-type field-effect transistors utilizing 2D materials. Presented at the 2026 IEEE/JSAP VLSI Technolo... -
Semiconductor Back-End
Europe Boosts Investment in Advanced Packaging and Chiplet Integration; imec’s FAMES Pilot Line Aims to Mitigate Regional Supply Chain Risks
Astute Group UK Overview Europe is significantly increasing investment in advanced packaging and chiplet integration technologies to diversify its semiconductor supply chain and reduce regional procurement risks, shifting focus from pure... -
Semiconductor Back-End
IEEE ECTC 2026 Program Reveals Latest Research in Advanced Packaging, Including 3D Integration, Hybrid Bonding, and New Substrate Materials
IEEE Electronic Components and Technology Conference (ECTC) USA Overview The program for the 76th IEEE Electronic Components and Technology Conference (ECTC) unveiled a wide array of cutting-edge research in advanced packaging, focusing ... -
Semiconductor Back-End
Imec and EV Group Set New World Record for 3D Chip Stacking Precision with Sub-40nm Wafer Bond Overlay
PR Newswire ベルギー Overview Imec and EV Group have achieved a world-record post-bond overlay accuracy of less than 40 nanometers across a 300mm wafer for 200nm pitch hybrid bonding, a crucial advancement for next-generation 3D ICs. Dem... -
Semiconductor Back-End
Pushing the Limits of 3D Integration: Imec and EVG Achieve Record 200nm Hybrid Bonding Pitch
imec ベルギー Overview Imec and EV Group (EVG) have announced a major breakthrough in 3D integration, demonstrating wafer-to-wafer hybrid bonding with an unprecedented 200nm copper interconnect pad pitch on 300mm wafers. Achieved with a ...
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