Interposer– tag –
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Researchers Develop Wafer-Scale Bonded Active Photonics Interposer: Pioneering Low-Loss, High-Bandwidth Optoelectronic Integration
EurekAlert! USA Overview Researchers have developed a wafer-scale bonded active photonics interposer that integrates photonic devices with electronic circuits at the wafer level, enabling low-loss, high-bandwidth communication with mass ... -
Tyndall National Institute Unveils Three Papers at ESTC 2026 Advancing Photonic Packaging and Chiplet Integration
Tyndall National Institute Ireland Overview Researchers from Tyndall National Institute presented three pivotal papers at ESTC 2026, showcasing significant innovations in photonic packaging, co-packaged optics, and chiplet integration te... -
Samsung Electro-Mechanics and Qualcomm Jointly Develop Organic Bridge Technology for 2.1D AI Semiconductor Packaging
The Elec South Korea Overview Samsung Electro-Mechanics and Qualcomm are collaboratively developing an advanced "organic bridge" technology for 2.1D packaging in AI semiconductors. This innovation utilizes organic materials, akin to PCBs... -
Semiconductor Equipment & Materials Market for HBM, Chiplets, and Low-CTE Materials Forecasted to Outpace Overall Wafer Equipment Growth
Mobility Foresights India Overview A Mobility Foresights report projects that the semiconductor equipment and materials market supporting sub-3nm logic, HBM, and chiplet integration will grow faster than the overall wafer equipment marke... -
Samsung Electro-Mechanics and Qualcomm Jointly Develop Organic Bridge for Advanced 2.1D AI Semiconductor Packaging
The Elec South Korea Overview Samsung Electro-Mechanics and Qualcomm have collaborated to develop an 'organic bridge' technology for advanced 2.1D packaging in AI semiconductors. This innovation facilitates high-density, high-bandwidth i... -
Samsung’s zHBM Concept Promises 70% Lower I/O Power, 2.3x Bandwidth vs. HBM5 via Hybrid Bonding for Edge AI
Tom's Hardware South Korea Overview Samsung proposes zHBM, an innovative memory architecture that directly stacks DRAM onto the processor, bypassing the interposer, and is projected to reduce I/O power by approximately 70% compared to HB... -
Tyndall Researchers Unveil Advanced Photonic Packaging Innovations at ESTC 2026, Including Co-Packaged Bioimaging and Cryogenic Edge Coupling
Tyndall National Institute Ireland Overview Researchers from the Tyndall National Institute presented three papers at the European Semiconductor Technology Conference (ESTC) 2026, showcasing significant advancements in photonic packaging... -
TSMC’s CoWoS Drives AI Semiconductor Demand, Japanese Material Suppliers Expand Ecosystem in Taiwan
The Economy Taiwan Overview TSMC's CoWoS advanced packaging technology is a primary driver for demand in AI accelerators and HBM, leading Japanese material suppliers like Namics (underfill) and Fujifilm (CMP slurry) to expand operations ... -
Tom’s Hardware Reports: TSMC Achieves 6-Micron Hybrid Bonding, Full HBM Integration Potentially Delayed to HBM4E/HBM5 (2027-Late 2020s)
Tom's Hardware USA Overview Tom's Hardware reports on the 2026 status of hybrid bonding, revealing TSMC's SoIC achieves 3.5D integration by combining hybrid-bonded stacks with CoWoS modules on silicon interposers, reaching 6-micron preci... -
AI Advancements Drive New Semiconductor Packaging Paradigm: Panel-Based Technologies Surpass Traditional Silicon Interposer Limits
Facebook (reposting an industry trend) USA Overview The rapid evolution of AI is pushing semiconductor packaging beyond the practical limits of traditional silicon interposers, driving a new paradigm. Panel-based packaging is emerging as...
