Electronic Components and Technology Conference– tag –
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Semiconductor Back-End
ECTC 2026 Highlights Advanced Packaging Future: Glass Substrates and FOPLP at the Core of System Innovation
Advanced Packaging Magazine USA Overview ECTC 2026 emphasized a structural shift in semiconductor innovation, moving beyond transistor scaling to packaging and integration technologies. Noteworthy advancements in heterogeneous integratio... -
Semiconductor Back-End
Semiconductor Engineering June 2026 Report Highlights On-Chip Photonics, Hybrid Bonding, and GaN for AI/HPC
Semiconductor Engineering USA Overview Semiconductor Engineering's June 2026 issue features on-chip photonics for AI systems, enhanced connectivity via hybrid bonding, new GaN power device designs, and managing manufacturing variations a... -
Semiconductor Back-End
Sub-10nm Residual Distortion Achieved in Low-Distortion Fusion Bonding with Pneumatically Curved Wafers for Advanced Semiconductors
arXiv USA Overview A recent arXiv publication reports the development of a novel low-distortion fusion bonding technique that employs pneumatically curved wafers to achieve an exceptionally low residual grid distortion of less than 10 na... -
Semiconductor Back-End
Amkor Bolsters U.S. Semiconductor Ecosystem with Over $7 Billion Investment in Arizona Advanced Packaging Facility
Amkor USA Overview Amkor Technology is dramatically escalating its commitment to a new advanced packaging and test facility in Peoria, Arizona, increasing its investment from an initial $2 billion to over $7 billion. This strategic expan... -
Semiconductor Back-End
IEEE ECTC 2026 Program Reveals Latest Research in Advanced Packaging, Including 3D Integration, Hybrid Bonding, and New Substrate Materials
IEEE Electronic Components and Technology Conference (ECTC) USA Overview The program for the 76th IEEE Electronic Components and Technology Conference (ECTC) unveiled a wide array of cutting-edge research in advanced packaging, focusing ... -
Semiconductor Back-End
IEEE ECTC 2026 Highlights Packaging Technologies Redefining AI and HPC Scalability Limits
IEEE Electronic Components and Technology Conference (ECTC) USA Overview The 2026 IEEE Electronic Components and Technology Conference (ECTC) spotlighted packaging technologies redefining AI and HPC scalability limits. Intel Foundry's R&... -
Semiconductor Back-End
CEA-Leti Demonstrates 1µm Pitch Die-to-Wafer Hybrid Bonding, Addressing AI Hardware Bottlenecks
Chiplet Marketplace France Overview CEA-Leti announced a significant advancement at ECTC 2026, demonstrating functional test vehicles utilizing die-to-wafer (D2W) hybrid bonding down to 1µm pitch, poised to resolve critical AI hardware b... -
Semiconductor Back-End
Imec and EV Group Set New World Record for 3D Chip Stacking Precision with Sub-40nm Wafer Bond Overlay
PR Newswire ベルギー Overview Imec and EV Group have achieved a world-record post-bond overlay accuracy of less than 40 nanometers across a 300mm wafer for 200nm pitch hybrid bonding, a crucial advancement for next-generation 3D ICs. Dem... -
Semiconductor Back-End
Pushing the Limits of 3D Integration: Imec and EVG Achieve Record 200nm Hybrid Bonding Pitch
imec ベルギー Overview Imec and EV Group (EVG) have announced a major breakthrough in 3D integration, demonstrating wafer-to-wafer hybrid bonding with an unprecedented 200nm copper interconnect pad pitch on 300mm wafers. Achieved with a ... -
Semiconductor Back-End
EV Group Unlocks Next-Gen Semiconductor Performance with Advanced Integration Technologies at ECTC 2026
EV Group オーストリア Overview At ECTC 2026, EV Group showcased its latest advancements in hybrid bonding, layer transfer, and maskless lithography, offering crucial solutions for next-generation heterogeneous integration and advanced pa...
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