AMD– tag –
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Semiconductor Back-End
AMD’s Helios AI Rack Challenges NVIDIA with HBM4 Memory Edge, Securing Microsoft as Customer; 2nm Process CPU Also Noted
TrendForce Taiwan Overview AMD's 'Helios AI Rack' is challenging NVIDIA's dominance in the AI market with its HBM4 memory advantage, securing Microsoft as a new key customer. The Helios rack is optimized for AI model training and inferen... -
New Technology
AMD Unveils Instinct MI455X AI Accelerator with 432GB HBM4 Memory, Surpassing Nvidia’s Rubin GPU, to Challenge Dominance in Data Centers with CDNA 5 and Helios Rack-Scale Architecture
Tom's Hardware USA Overview AMD has announced the Instinct MI455X AI accelerator, integrating its CDNA 5 and Helios rack-scale architectures. This new product features a substantial 432GB of HBM4 memory, significantly exceeding the 288GB... -
New Technology
Nvidia Details Rubin Architecture Optimizations for AI Inference: Tackling Memory Bottlenecks and HBM Shortages Amid Intensifying AI Chip Race
Tom's Hardware USA Overview Nvidia has unveiled comprehensive inference optimization strategies for its next-generation Rubin AI accelerator architecture, focusing on efficient management of Mixture-of-Experts (MoE) models and improved d... -
Semiconductor Back-End
AT&S to Invest €1.5-2 Billion in Malaysian ABF Capacity, While IBIDEN Allocates ¥500 Billion for AI/HPC Substrate Expansion in Japan & Overseas
Sector Signals China Overview AT&S has agreed with AMD and another major tech firm to expand high-end IC substrate capacity for AI/HPC, planning a €1.5-2 billion investment in its Kulim, Malaysia plant, fully supported by long-term c... -
Semiconductor Back-End
NVIDIA’s AI Chip Supply Bottleneck Stems from TSMC’s Booked CoWoS Capacity, Intel EMIB Emerges as Alternative
BingX International Overview TSMC's CoWoS (Chip-on-Wafer-on-Substrate) advanced packaging capacity is fully booked through 2026, with 52-78 week lead times, posing a severe supply bottleneck for NVIDIA. While NVIDIA reportedly secures 60... -
Semiconductor Back-End
NVIDIA’s 2027 CoWoS Supply Forecast Raised 69% to 1.1 Million Interposers; AMD to See Over 50% Growth: KeyBanc Asia Supply Chain Checks Reveal Strong Demand
TipRanks USA Overview KeyBanc analyst John Vinh's Asia supply chain checks reveal strong, persistent demand across the semiconductor ecosystem. NVIDIA's 2027 CoWoS supply forecast for Rubin and Rubin Ultra was raised 69% to 1.1 million i... -
Semiconductor Back-End
TSMC’s N3 Node and Expanding CoWoS Capacity Solidify Nvidia’s Future, While HBM4 Multi-Vendor Qualification Reduces Supply Risk
Seeking Alpha USA Overview TSMC and ASML's raised guidance confirms persistent AI infrastructure demand-supply imbalance. TSMC's N3 node, utilized for Nvidia's Rubin GPUs, is fully booked, and CoWoS advanced packaging capacity is expandi... -
Semiconductor Back-End
TSMC’s CoWoS Supply to Reach At Least 200K Wafers Monthly by 2027, Accelerating Expansion to Meet Soaring AI Demand
DigiTimes Taiwan Overview TSMC is accelerating its CoWoS (Chip-on-Wafer-on-Substrate) advanced packaging capacity expansion to meet robust AI chip demand, with market indications suggesting monthly output will reach at least 200,000 wafe... -
Semiconductor Back-End
HBM Supply Crunch Deepens: DRAM Wafer Production and Advanced Packaging/Test Emerge as Dual Bottlenecks Amid Samsung, SK Hynix, Micron Rivalry
Industry Analysis International Overview High Bandwidth Memory (HBM), central to AI, faces dual bottlenecks in both DRAM wafer manufacturing and advanced packaging/test capacity. HBM achieves high bandwidth and energy efficiency through ... -
Semiconductor Back-End
TSMC Plans Three Advanced Packaging Plants at Chiayi Science Park, Targeting Mass Production by 2027 for AI and Quantum Tech
Taiwan News Taiwan Overview TSMC plans three advanced packaging plants at Taiwan's Chiayi Science Park, with two slated for mass production by 2027. These facilities will focus on AI, heterogeneous integration, and quantum technology, le...