Chiplet– tag –
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New Technology
Tyndall National Institute Unveils Three Papers at ESTC 2026 Advancing Photonic Packaging and Chiplet Integration
Tyndall National Institute Ireland Overview Researchers from Tyndall National Institute presented three pivotal papers at ESTC 2026, showcasing significant innovations in photonic packaging, co-packaged optics, and chiplet integration te... -
New Technology
Taiyo Holdings Launches Next-Gen Semiconductor Packaging Material ‘FPIM Series,’ First to Achieve 700nm CD Three-Layer RDL on 12-inch Wafers
PR Newswire Japan Overview Taiyo Holdings, in collaboration with imec, has launched its "FPIM Series," a next-generation semiconductor packaging material that enables the first successful formation of a three-layer Redistribution Layer (... -
New Technology
Semiconductor Equipment & Materials Market for HBM, Chiplets, and Low-CTE Materials Forecasted to Outpace Overall Wafer Equipment Growth
Mobility Foresights India Overview A Mobility Foresights report projects that the semiconductor equipment and materials market supporting sub-3nm logic, HBM, and chiplet integration will grow faster than the overall wafer equipment marke... -
New Technology
Sub-2nm Nodes Blur Process Boundaries as Chiplet Integration Drives Increased Thermal Density and Structural Stress, Hybrid Bonding Emerges as Key Solution
Semiconductor Engineering USA Overview At sub-2nm process nodes, shrinking transistors and heightened process sensitivities are blurring traditional manufacturing boundaries, leading to increased thermal density and structural stress in ... -
New Technology
Advanced AI Chips Face Intensified Thermal Management Challenges: TSMC Plans 20-Layer HBM Integration in 14x Reticle CoWoS by 2028, Microchannel Cooling Emerges as Key Technology
36Kr China Overview Thermal management has become a critical challenge in advanced-packaged AI chips, particularly due to thermal coupling issues across chiplets in 2.5D, 3D IC, CoWoS, and HBM architectures. TSMC's roadmap for 2028 inclu... -
Market Trends
BESI Hybrid Bonding System Orders Exceed 150 Units, HBM5 Onward to Accelerate Memory Adoption
PhotonCap Unknown Overview BESI has secured over 150 cumulative orders for its hybrid bonding systems, with six integrated production lines (including 30 BESI bonders) implemented by major logic customers in partnership with Applied Mate... -
New Technology
Tyndall Researchers Unveil Advanced Photonic Packaging Innovations at ESTC 2026, Including Co-Packaged Bioimaging and Cryogenic Edge Coupling
Tyndall National Institute Ireland Overview Researchers from the Tyndall National Institute presented three papers at the European Semiconductor Technology Conference (ESTC) 2026, showcasing significant advancements in photonic packaging... -
New Technology
Intel and Ayar Labs Propel 224Gbps+ Scale-Up with Co-Packaged Optics, Extending NVIDIA NVLink
Silicon Co-Design USA Overview Co-Packaged Optics (CPO) technology is enabling 224Gbps+ scale-up interconnects, with Intel pursuing a truly integrated approach via its Optical Compute Interconnect (OCI) that heterogeneously integrates In... -
New Technology
EV Group Solves Co-packaged Optics Manufacturing Challenges with Wafer Bonding and Nanoimprint for High-Density Integration
Quality Digest USA Overview EV Group (EVG) is addressing critical manufacturing challenges for Co-packaged Optics (CPO), which integrates Photonic Integrated Circuits (PICs), lasers, and optical structures within a single package. EVG's ... -
New Technology
AI Infrastructure Startups Drive Optical Interconnect Breakthroughs Beyond Copper Limits: Ayar Labs, Lightmatter, and HyperLight Lead Innovation
New Market Pitch USA Overview Leading AI infrastructure startups, including Ayar Labs, Lightmatter, and HyperLight, are advancing optical interconnect technologies to overcome the limitations of copper cabling. Ayar Labs is expanding pro...