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Rapidus Explores Panel-Level Packaging on Glass Substrates for Next-Gen AI/HPC Processors
Tom's Hardware Japan Overview Japanese semiconductor firm Rapidus is actively exploring the adoption of panel-level packaging (PLP) on large 600mm x 600mm glass panels for manufacturing high-end multi-chiplet processors designed for AI a... -
KLA Enhances AI Chip Production with Comprehensive Wafer Inspection and Metrology for Advanced Packaging
KLA USA Overview KLA offers comprehensive inspection and metrology solutions for complex advanced wafer-level packaging processes, including 2.5D/3D integration, WLCSP, and FOWLP. Its AI-powered systems improve yield, defect detection, a... -
Japan’s Rapidus and LSTC Launch Optoelectronic Advanced Packaging Project to Cut AI Chip Power Consumption
creating nano technologies inc. (via Digitimes) Japan Overview Japan's next-generation semiconductor manufacturer Rapidus, in collaboration with the Leading-edge Semiconductor Technology Center (LSTC) and other institutions, has initiate... -
EV Group Unlocks Next-Gen Semiconductor Performance with Advanced Integration Technologies at ECTC 2026
EV Group オーストリア Overview At ECTC 2026, EV Group showcased its latest advancements in hybrid bonding, layer transfer, and maskless lithography, offering crucial solutions for next-generation heterogeneous integration and advanced pa... -
ASMC 2026 Convenes Global Semiconductor Leaders to Tackle Advanced Manufacturing Challenges and Accelerate Innovation
SEMI USA Overview The Advanced Semiconductor Manufacturing Conference (ASMC 2026), held from May 11-14, brought together semiconductor manufacturers, equipment and materials suppliers, and academia to discuss innovative strategies and me... -
JSR Fortifies Advanced Semiconductor Material Production and R&D in Taiwan to Meet Surging AI Demand
JSR株式会社 Japan Overview JSR, a leading semiconductor materials manufacturer, announced a significant expansion of its production and R&D capabilities in Taiwan, effective April 2026. This strategic move, driven by key customer req... -
TSMC Unveils SoIC 3D Stacking Roadmap: Achieving 4.5µm Pitch by 2029, Enabling Face-to-Face Chiplet Integration for Fujitsu Monaka CPU
専門メディア Taiwan Overview TSMC has revealed its SoIC (System on Integrated Chips) 3D stacking roadmap, targeting a 4.5-micron pitch by 2029, down from today's 6 microns. This advanced face-to-face (F2F) chiplet stacking technology, pa... -
Taiwan’s Foxconn Enters Next-Gen Server Development, Adopting Optoelectronic Integration as Core Technology
CNA (中央通訊社) Taiwan Overview Taiwanese electronics manufacturing giant Foxconn (Hon Hai Precision Industry) has reportedly made a significant entry into developing next-generation servers centered on optoelectronic integration techno...
