IEEE– tag –
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In-Orbit Edge Computing Architecture for Small Satellite Constellations Reduces Data Downlink by Up to 80%
IEEE Communications Magazine (Conference Proceedings - July 2026) International Overview A new in-orbit edge computing architecture for small satellite constellations has been announced, capable of reducing data downlink to Earth by up t... -
GaN Power Amplifiers Demonstrate Superior Radiation Hardness Over Si Devices in Simulated Space Environments
IEEE Transactions on Nuclear Science (Conference Proceedings - July 2026) International Overview Gallium Nitride (GaN)-based power amplifiers, developed for space applications, have exhibited significantly superior radiation hardness com... -
Space Data Centers Poised to Revolutionize AI Infrastructure with 8x Terrestrial Power Generation and Vacuum Cooling
IEEE Computer Society USA Overview Space-based data centers offer a transformative solution for escalating AI infrastructure demands, potentially generating up to eight times more power from solar energy than terrestrial counterparts. Th... -
ASML, TSMC, and Imec Achieve Breakthrough 300mm Integration for Industry-Ready 2D-Material Transistors
The cleanroom Portal - Reinraum Online Germany Overview Imec, in collaboration with ASML and TSMC, presented a robust and scalable 300mm integration approach for n- and p-FETs based on 2D materials at the IEEE/JSAP Symposium 2026. This b... -
Samsung Validates Hybrid Copper Bonding’s Superior Thermal Management for HBM4E, Outperforming TCB
ET News (via IEEE paper) South Korea Overview Samsung published research in IEEE demonstrating that its Hybrid Copper Bonding (HCB) offers significant thermal management advantages over conventional Thermo-Compression Bonding (TCB) for H... -
Sub-10nm Residual Distortion Achieved in Low-Distortion Fusion Bonding with Pneumatically Curved Wafers for Advanced Semiconductors
arXiv USA Overview A recent arXiv publication reports the development of a novel low-distortion fusion bonding technique that employs pneumatically curved wafers to achieve an exceptionally low residual grid distortion of less than 10 na... -
IEEE ECTC 2026 Program Reveals Latest Research in Advanced Packaging, Including 3D Integration, Hybrid Bonding, and New Substrate Materials
IEEE Electronic Components and Technology Conference (ECTC) USA Overview The program for the 76th IEEE Electronic Components and Technology Conference (ECTC) unveiled a wide array of cutting-edge research in advanced packaging, focusing ... -
IEEE ECTC 2026 Highlights Packaging Technologies Redefining AI and HPC Scalability Limits
IEEE Electronic Components and Technology Conference (ECTC) USA Overview The 2026 IEEE Electronic Components and Technology Conference (ECTC) spotlighted packaging technologies redefining AI and HPC scalability limits. Intel Foundry's R&... -
CEA-Leti Demonstrates 1µm Pitch Die-to-Wafer Hybrid Bonding, Addressing AI Hardware Bottlenecks
Chiplet Marketplace France Overview CEA-Leti announced a significant advancement at ECTC 2026, demonstrating functional test vehicles utilizing die-to-wafer (D2W) hybrid bonding down to 1µm pitch, poised to resolve critical AI hardware b... -
Imec and EV Group Set New World Record for 3D Chip Stacking Precision with Sub-40nm Wafer Bond Overlay
PR Newswire ベルギー Overview Imec and EV Group have achieved a world-record post-bond overlay accuracy of less than 40 nanometers across a 300mm wafer for 200nm pitch hybrid bonding, a crucial advancement for next-generation 3D ICs. Dem...
