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Samsung Electro-Mechanics and Qualcomm Jointly Develop Organic Bridge Technology for 2.1D AI Semiconductor Packaging
The Elec South Korea Overview Samsung Electro-Mechanics and Qualcomm are collaboratively developing an advanced "organic bridge" technology for 2.1D packaging in AI semiconductors. This innovation utilizes organic materials, akin to PCBs... -
Samsung Electro-Mechanics and Qualcomm Jointly Develop Organic Bridge for Advanced 2.1D AI Semiconductor Packaging
The Elec South Korea Overview Samsung Electro-Mechanics and Qualcomm have collaborated to develop an 'organic bridge' technology for advanced 2.1D packaging in AI semiconductors. This innovation facilitates high-density, high-bandwidth i... -
Google Reportedly Considering CoWoS as Backup for 2027 TPUs Amid Intel EMIB-T Substrate Yield Lag Reports
No source name USA Overview Google's Humufish TPU project, slated for mass production by late 2027, is reportedly considering TSMC's CoWoS as a backup packaging solution, following reports of lagging substrate yields for Intel's EMIB-T t... -
FCS Group Secures Exclusive Taiwan/Southeast Asia Distribution Rights for CKST Glass Substrate Equipment, Entering AI Advanced Packaging Market
BigGo Finance Taiwan Overview FCS Group, an injection molding machine manufacturer, has secured exclusive distribution rights for CKST (China Korea Smart Technology) glass substrate advanced packaging equipment in Taiwan and Southeast As... -
TSMC to Boost 2nm and 3nm Advanced Process Capacity by up to 22% by Mid-2027 to Meet Soaring AI/HPC Demand
BigGo Finance Taiwan Overview TSMC plans a significant capacity expansion for its 2nm and 3nm advanced processes to meet surging demand for AI and HPC chips. The 2nm monthly capacity is projected to increase by approximately 22% to 110,0... -
TSMC to Double CoWoS Advanced Packaging Capacity to 260,000 Wafers/Month by 2028, Driving OSAT and Intel Orders Amid Supply Crunch
BigGo Finance Taiwan Overview TSMC plans to double its CoWoS advanced packaging capacity from 130,000 wafers/month to 260,000 wafers/month by the end of 2028, primarily driven by surging AI chip demand. This expansion, centered on its AP... -
Intel and Ayar Labs Propel 224Gbps+ Scale-Up with Co-Packaged Optics, Extending NVIDIA NVLink
Silicon Co-Design USA Overview Co-Packaged Optics (CPO) technology is enabling 224Gbps+ scale-up interconnects, with Intel pursuing a truly integrated approach via its Optical Compute Interconnect (OCI) that heterogeneously integrates In... -
Newphotonics Unveils 6.4Tbps Laser-Integrated NPO Engine for AI Networks, Compliant with Open CPX
Converge Digest Unknown Overview Newphotonics has unveiled a 6.4Tbps laser-integrated Near-Packaged Optics (NPO) engine designed for AI networks. This innovative optical engine aims to resolve data processing bottlenecks and significantl... -
Ayar Labs Expands 2026 Funding to $650 Million to Scale Manufacturing-Ready CPO for AI Scale-Up Beyond the Rack
Ayar Labs USA Overview Ayar Labs announced an expansion of its 2026 funding to a total of $650 million. This additional capital will be used to dramatically scale the production capacity of its manufacturing-ready Co-Packaged Optics (CPO... -
Taiwan Accelerates Mass Production of Silicon Photonics for AI Infrastructure; TSMC and ASE Lead CPO Mainstreaming Efforts
Taiwan News Taiwan Overview Taiwan is accelerating the mass production of silicon photonics technology to meet the demands of AI infrastructure. Led by TSMC and ASE Technology Holding, this initiative aims to mainstream Co-Packaged Optic...
