HBM– tag –
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Samsung Electronics Establishes Advanced Packaging R&D Center in Yokohama to Deepen Collaboration with Japanese Suppliers for HBM Technologies
digitimes South Korea Overview Samsung Electronics has opened an advanced packaging research center in Yokohama, Japan, to strengthen development cooperation with Japanese suppliers of critical materials and equipment for HBM. This strat... -
NVIDIA to Boost CoWoS Production Capacity by 3.5x to Over 120,000 Wafers/Month by End-2026, Securing HBM4 Supply
SemiconductorX USA Overview NVIDIA plans to scale its CoWoS (Chip-on-Wafer-on-Substrate) production capacity by 3.5x to 120,000–130,000 wafers per month by the end of 2026, up from 35,000, driven largely by its own demand. The company is... -
Samsung Foundry Unveils Next-Gen HBM Architecture Leveraging Advanced Packaging for AI/HPC Performance
Samsung Foundry South Korea Overview Samsung Foundry announced a new HBM architecture that combines advanced logic nodes with advanced packaging, promising significantly higher bandwidth and energy efficiency for AI and HPC systems. Its ... -
TSMC’s CoWoS Drives AI Semiconductor Demand, Japanese Material Suppliers Expand Ecosystem in Taiwan
The Economy Taiwan Overview TSMC's CoWoS advanced packaging technology is a primary driver for demand in AI accelerators and HBM, leading Japanese material suppliers like Namics (underfill) and Fujifilm (CMP slurry) to expand operations ... -
Moldex3D Compression Molding Simulation Achieves Semiconductor Package Defect Prediction and Quality Enhancement
Rheologist gaze & solutions (Moldex3D) Taiwan Overview Moldex3D provides CAE simulation tools for compression molding processes in advanced semiconductor packaging, enabling precise simulation of how encapsulating materials like epoxy mo... -
Tom’s Hardware Reports: TSMC Achieves 6-Micron Hybrid Bonding, Full HBM Integration Potentially Delayed to HBM4E/HBM5 (2027-Late 2020s)
Tom's Hardware USA Overview Tom's Hardware reports on the 2026 status of hybrid bonding, revealing TSMC's SoIC achieves 3.5D integration by combining hybrid-bonded stacks with CoWoS modules on silicon interposers, reaching 6-micron preci... -
P Equity Research Analyzes Advanced Semiconductor Packaging: Illuminating the Roles of Underfill and Mold in 2.5D and CoWoS Architectures
P Equity Research Global Overview A P Equity Research article delves into advanced semiconductor packaging, including 2.5D and CoWoS architectures, detailing the crucial role of adhesives and encapsulants when processors and memory layer... -
MDPI Review Compares Advanced Semiconductor Packaging: Spotlighting Thermal Management and Reliability Challenges
MDPI Switzerland Overview A review paper published in MDPI critically compares advanced packaging architectures, including 2D, 2.5D, and 3D integration, detailing challenges in thermal management, warpage from thermomechanical mismatch, ... -
AI Technology Unveils Enhanced Thermal Dissipation Molding Underfill for HBM and 3D DRAM to Boost Package Reliability
AI Technology, Inc. USA Overview AI Technology, Inc. (AIT) has announced a new Molding Underfill (MUF) with significantly enhanced thermal dissipation, targeting advanced semiconductor packaging like HBM, 3D DRAM, and AI processors. This... -
Unimicron Reports 90% Surge in Equipment Demand from AI, Japanese SME Dependence on ABF Substrates Creates Bottleneck
BigGo Finance Taiwan Overview Unimicron Technology Chairman Chien Shan-Chieh stated that escalating AI demand has severely impacted the substrate sector, worsening supply-demand imbalance due to heavy reliance on small and medium-sized J...
