Heterogeneous Integration– tag –
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Semiconductor Back-End
Intel Accelerates Next-Gen AI Semiconductor Development in U.S. Fabs with Foveros and Enhanced EMIB-T Packaging
Intel USA Overview Intel is aggressively advancing next-generation AI semiconductor development in its U.S. fabs by leveraging cutting-edge advanced packaging technologies such as Foveros stacking, EMIB silicon bridges, and particularly ... -
Semiconductor Back-End
NCF Evolves into Essential Material for AI Chips, HBM Stacking, and Advanced Packaging, Ensuring Stable Bonding and Enhanced Reliability
LP Information Data Global Overview Non-Conductive Film (NCF) has evolved from an auxiliary adhesive to an indispensable material in advanced packaging, driven by rapid advancements in AI servers, accelerated computing chips, High-Bandwi... -
Semiconductor Back-End
Applied Materials Finds New Equipment Opportunities in PLP for AI Accelerators; KLA’s Process Control Gains Criticality for Complex AI Chips
TIKR.com USA Overview Applied Materials is capitalizing on new equipment opportunities within Panel-Level Packaging (PLP) as AI accelerators integrate more processors and memory, shifting from traditional circular wafers to rectangular p... -
Semiconductor Back-End
Fraunhofer Unveils APECS Pilot Line: Accelerating Advanced Packaging and Heterogeneous Integration Under EU Chips Act
Fraunhofer-Institut für Angewandte Festkörperphysik IAF Germany Overview Under the EU Chips Act, Fraunhofer IAF has established APECS, a new pilot line for advanced packaging and heterogeneous integration, designed to bridge microelectro... -
Semiconductor Back-End
NVIDIA Commits $1.5B Prepayment to Amkor for U.S. AI Chip Advanced Packaging Expansion by 2028
ETElectronics USA Overview NVIDIA is investing $1.5 billion in Amkor Technology through an upfront payment to significantly expand its advanced packaging capacity for AI chips in the U.S. This strategic partnership ensures NVIDIA's acces... -
Semiconductor Back-End
Indian State of Madhya Pradesh Signs MoU for ₹6,200 Crore OSAT Facility with Paras Semiconductors, Advancing Heterogeneous Integration and 3D Packaging
ET Government India Overview The government of Madhya Pradesh, India, announced a Memorandum of Understanding with Paras Semiconductors to establish an advanced semiconductor packaging OSAT (Outsourced Semiconductor Assembly and Test) fa... -
Semiconductor Back-End
China’s HKC Invests 4 Billion RMB in New Advanced Semiconductor Packaging and Test Line in Shaoxing for Heterogeneous Integration
TrendForce China Overview China's HKC announced a 4 billion RMB ($550 million) investment in an advanced semiconductor packaging and test project in Shaoxing Economic Development Zone. A new subsidiary, Zhejiang Huaxin Advanced Semicondu... -
Semiconductor Back-End
TSMC Plans Three Advanced Packaging Plants at Chiayi Science Park, Targeting Mass Production by 2027 for AI and Quantum Tech
Taiwan News Taiwan Overview TSMC plans three advanced packaging plants at Taiwan's Chiayi Science Park, with two slated for mass production by 2027. These facilities will focus on AI, heterogeneous integration, and quantum technology, le... -
Semiconductor Back-End
Korea Institute of Industrial Technology Develops Novel Chip Integration Process Achieving 4x Commercial HBM Density
EurekAlert! South Korea Overview Researchers at the Korea Institute of Industrial Technology (KITECH) have developed an innovative chip integration process that achieves approximately four times the integration density of commercial High... -
Semiconductor Back-End
EU Chips Act Funds €210 Million for 3D IC Advanced Packaging, Benefiting Infineon, ASML Subsidiary, and Soitec
Qishuai-cn Germany Overview The European Commission announced its first EU Chips Act-funded project, allocating a total of €210 million to Germany's Infineon, an ASML subsidiary in the Netherlands, and France's Soitec. This funding is de...