TSMC– tag –
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Semiconductor Back-End
TSMC CoWoS & SoIC Packaging Become Primary AI Chip Bottleneck, Forecasting 10-20% Global Supply Shortfall by 2027 Amidst Doubling Demand
Exponential Industry Taiwan Overview TSMC's CoWoS and SoIC packaging technologies are identified as the primary physical constraints in AI GPU and accelerator production. Global CoWoS demand is projected to double from 1.3-1.4 million wa... -
Semiconductor Back-End
JEDEC Relaxes HBM4 Package Height to 775 µm, Enabling 12-Hi/16-Hi Stacks Without Immediate Cu-Cu Hybrid Bonding
Exponential Industry USA Overview JEDEC has relaxed the HBM4 package height specification from 720 µm to 775 µm, allowing for 12-Hi and 16-Hi stack HBM modules without immediate reliance on Cu-Cu hybrid bonding. HBM utilizes 3D stacked D... -
Semiconductor Back-End
Applied Materials Reports $9.12 Billion in Q3 2026 Revenue, Plans to Double Semiconductor Systems Output by 2028 Amid Surging Demand
GlobeNewswire USA Overview Applied Materials announced Q3 2026 revenue of $9.12 billion, marking a 25% year-over-year increase and slightly exceeding market expectations. The company maintains strong leadership and a pipeline of innovati... -
Semiconductor Back-End
KLA Forecasts $1.1 Billion in Advanced Packaging Revenue for 2026, Driven by Surging AI and HBM Demand
Quartz USA Overview KLA Corporation anticipates its advanced packaging business revenue will reach approximately $1.1 billion in 2026, representing over 70% year-over-year growth, fueled by increasing AI infrastructure investments and se... -
Semiconductor Back-End
Ibiden Commits ¥500 Billion to ABF Substrates for AI Servers, Anticipating Supply Crunch Beyond 2028
MK Japan Overview Ibiden, the world's leading AI substrate manufacturer, announced a ¥500 billion investment from this year to 2028 to expand production capacity for IC package substrates for AI and high-performance servers. Despite long... -
Semiconductor Back-End
AI Demand Strains CoWoS and SoIC Supply: Global Demand to Double to Over 2.5M Wafers by 2027, Facing 10-20% Shortfall
Exponential Industry USA Overview TSMC's CoWoS and SoIC advanced packaging technologies are now the primary physical constraints for AI GPU and accelerator production. Global CoWoS demand is projected to double from 1.3-1.4 million wafer... -
Semiconductor Back-End
NVIDIA Accelerates Feynman AI Platform; TSMC Ramps SoIC Capacity to 50K Wafers/Month by 2027
Benzinga Taiwan Overview NVIDIA is expediting the roadmap for its next-generation Feynman AI platform, prompting TSMC to significantly boost its advanced packaging capabilities. TSMC is rapidly expanding its SoIC technology production, a... -
Semiconductor Back-End
TSMC Achieves Over 98% CoWoS Yield; ABF Substrates Emerge as Next Bottleneck for AI Chip Expansion
Xenospectrum Taiwan Overview TSMC has announced that its advanced CoWoS packaging technology, particularly for 5.5x reticle AI chip products, consistently achieves yields exceeding 98%. While CoWoS capacity has doubled annually for three... -
Photonics
NVIDIA and Broadcom Dominate 2026 CPO Supply Chain; TSMC’s COUPE Capacity Prioritized for AI Accelerators
SupplyICs USA Overview The 2026 Co-Packaged Optics (CPO) supply chain is facing severe challenges, characterized by a concentrated production landscape where NVIDIA and Broadcom largely control key platforms. A critical bottleneck stems ... -
New Technology
Taiwan’s NYCU and TSMC Achieve 0.42-Nanometer Semiconductor Interface Breakthrough, Revolutionizing Transistor Performance
ScienceDaily Taiwan Overview Researchers from National Yang Ming Chiao Tung University (NYCU), in collaboration with TSMC Corporate Research, have achieved a 0.42-nanometer breakthrough in atomically thin semiconductors by precisely engi...