Chiplet– tag –
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New Technology
Wooptix Unveils Astronomy-Inspired Tech to Resolve ‘Optical Bottleneck’ in AI Chip Packaging, Boosting Yield and Performance
EE Times USA Overview Wooptix has announced a groundbreaking new technology that applies adaptive optics, originally developed for astronomy, to resolve the 'optical bottleneck' in advanced AI chip packaging. This innovation dramatically... -
Market Trends
Chiplet Underfill Dispensing Market to Grow Through 2036 Driven by HBM and C2W Hybrid Bonding Void Reduction Needs
Fact.MR USA Overview This article summarizes a market research report from Fact.MR. The chiplet underfill dispensing market is growing, driven by the need for wafer-level underfill in HBM manufacturing and tailored viscosity/cure profile... -
New Technology
Intel Seeks Senior Module Test Engineer in Kulim, Malaysia to Advance CUF Module Improvement and New Material Application for Advanced Packaging
Jooble USA Overview Intel is recruiting a Senior Module Test Engineer in Kulim, Malaysia, to lead the design and development of advanced manufacturing test processes. This role supports post-packaging burn-in, final test, and system test... -
Semiconductor Back-End
NCF Evolves into Essential Material for AI Chips, HBM Stacking, and Advanced Packaging, Ensuring Stable Bonding and Enhanced Reliability
LP Information Data Global Overview Non-Conductive Film (NCF) has evolved from an auxiliary adhesive to an indispensable material in advanced packaging, driven by rapid advancements in AI servers, accelerated computing chips, High-Bandwi... -
Semiconductor Back-End
Applied Materials Finds New Equipment Opportunities in PLP for AI Accelerators; KLA’s Process Control Gains Criticality for Complex AI Chips
TIKR.com USA Overview Applied Materials is capitalizing on new equipment opportunities within Panel-Level Packaging (PLP) as AI accelerators integrate more processors and memory, shifting from traditional circular wafers to rectangular p... -
Semiconductor Back-End
TYLsemi Raises $43M Seed Funding, De-Risking Chiplet-Based Designs with Full-Stack Platform for AI Infrastructure Builders
Tom's Hardware USA Overview Semiconductor startup TYLsemi secured $43 million in seed funding and unveiled a novel business model designed to de-risk chiplet-based designs for AI infrastructure builders. The company aims to accelerate ef... -
Semiconductor Back-End
BESI Records All-Time High Orders with 128.8% Y-o-Y Growth Driven by AI Packaging and Hybrid Bonding Demand
BE Semiconductor Industries N.V. Netherlands Overview BE Semiconductor Industries (BESI), a Dutch equipment manufacturer, reported a record €292.9 million in orders for Q2 2026, marking a 128.8% year-on-year increase, fueled by strong de... -
Semiconductor Back-End
Indian State of Madhya Pradesh Signs MoU for ₹6,200 Crore OSAT Facility with Paras Semiconductors, Advancing Heterogeneous Integration and 3D Packaging
ET Government India Overview The government of Madhya Pradesh, India, announced a Memorandum of Understanding with Paras Semiconductors to establish an advanced semiconductor packaging OSAT (Outsourced Semiconductor Assembly and Test) fa... -
Semiconductor Back-End
CoWoS Identified as Core Bottleneck for AI GPU Shipments, Distinct from HBM Shortage
BiyaPay Blog International Overview CoWoS (Chip-on-Wafer-on-Substrate) is an advanced packaging technology integrating GPUs, HBM, and chiplets; its limited capacity forms a critical manufacturing integration bottleneck for AI GPU shipmen... -
Semiconductor Back-End
NVIDIA’s AI Chip Supply Bottleneck Stems from TSMC’s Booked CoWoS Capacity, Intel EMIB Emerges as Alternative
BingX International Overview TSMC's CoWoS (Chip-on-Wafer-on-Substrate) advanced packaging capacity is fully booked through 2026, with 52-78 week lead times, posing a severe supply bottleneck for NVIDIA. While NVIDIA reportedly secures 60...