Intel– tag –
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Quantum Computing
HPE Expands Strategic Partnerships with Intel, Quantinuum, and Others for Hybrid Quantum Supercomputing
Marketscreener USA Overview Hewlett Packard Enterprise (HPE) has broadened its partnerships with key industry players, including Intel, IQM, Qblox, Quantinuum, QuEra Computing, Quantum Machines, Rigetti, and Riverlane, aiming to build a ... -
New Technology
Semiconductor Engineering Report Highlights AI-Driven Optical-Logic Integration and Hybrid Bonding for Increased Interconnect Density
Semiconductor Engineering USA Overview A June 2026 Semiconductor Engineering report emphasizes that AI systems are driving a closer integration of optics and logic, necessitating co-evolution in fabrication, packaging, thermal management... -
Semiconductor Back-End
Intel Appoints Former SK hynix CEO Lee Seok-hee as Senior VP of Advanced Packaging to Bolster AI Systems
The Korea Herald South Korea Overview Intel has appointed Lee Seok-hee, former CEO of SK hynix and SK On, as Senior Vice President of Intel Foundry. Lee will lead advanced packaging, system integration, back-end technology development, a... -
Semiconductor Back-End
Samsung’s Advanced Packaging Lag Clouds AI Chip Comeback, Falling Behind TSMC and Intel
digitimes Taiwan Overview Despite efforts in HBM and foundry services, Samsung Electronics' lagging advanced packaging capabilities remain a significant weakness in the AI chip supply chain. Industry sources and Korean media reports indi... -
Semiconductor Back-End
Semiconductor Engineering June 2026 Report Highlights On-Chip Photonics, Hybrid Bonding, and GaN for AI/HPC
Semiconductor Engineering USA Overview Semiconductor Engineering's June 2026 issue features on-chip photonics for AI systems, enhanced connectivity via hybrid bonding, new GaN power device designs, and managing manufacturing variations a... -
Semiconductor Back-End
AI Infrastructure Demand Intensifies Memory Shortage: TSMC CoWoS Constraints and Vietnam Labor Shortages Create Compound Challenges
Sourceability USA Overview Rising AI infrastructure demand is generating new challenges across the semiconductor supply chain, notably a worsening memory shortage. TSMC's CoWoS packaging limitations are expected to persist with the AI bo... -
Semiconductor Back-End
Glass Core Substrates Emerge as Next-Gen AI/HPC Packaging Technology, Face Commercialization Hurdles in Brittleness and TGV Formation
Pandaily China Overview Glass core substrates are garnering significant attention in the semiconductor packaging industry, driven by escalating performance demands in AI chips, HPC, and advanced processor packaging. They offer superior d... -
Semiconductor Back-End
TSMC Strengthens Glass Substrate Supply Chain for CoWoS, Achieving 16% Warpage Reduction for High-Performance AI GPUs
Wccftech USA Overview TSMC is expanding its glass substrate supply chain for advanced CoWoS packaging, collaborating with Innolux and Ibiden. Glass substrates demonstrate a 16% reduction in package warpage, along with improved thermal ex... -
Semiconductor Back-End
ABF Substrates Become AI Accelerator Bottleneck, Nvidia’s H100 Requires 12+ Layers; Glass Substrates Emerge as Next-Gen Solution, Commercialization Years Away
Data Gravity USA Overview Ajinomoto Build-up Film (ABF) substrates are a critical component and growing bottleneck in AI accelerators, HBM, and chiplet-based designs. Nvidia's H100 GPU demands over 12 layers of ABF, with the Blackwell B2... -
Semiconductor Back-End
TSMC’s CoWoS Capacity, Targeting 125K-130K Wafers/Month by 2026, Still Falls Short as Nvidia Reserves 60% of Output
INDmoney India Overview TSMC's CoWoS advanced packaging remains a hidden bottleneck in AI chip supply, despite targeting 125,000-130,000 wafers per month capacity by the end of 2026. Demand continues to outstrip supply, with TSMC's CEO s...