Intel– tag –
-
Photonics
Data Gravity Analysis: AI Interconnects Shift from Copper to Optical, with NVIDIA Leading with CPO-Equipped Spectrum-X Switches
Data Gravity USA Overview Data Gravity's analysis indicates that frontier AI performance constraints are shifting from accelerator supply to interconnects, highlighting challenges in chip-to-chip, GPU-to-GPU, and rack-to-rack connectivit... -
Photonics
NVIDIA CEO Jensen Huang Unveils ‘Copper-and-Optics Roadmap,’ Positioning CPO as Core AI Infrastructure by 2028
Futubull Community Hong Kong Overview NVIDIA CEO Jensen Huang presented the 'Copper-and-Optics Roadmap' for AI infrastructure at COMPUTEX TAIPEI 2026, signaling a shift from copper to optical fiber for data center interconnects. The road... -
Market Trends
NVIDIA Achieves $81.6 Billion Revenue in FY27 Q1, Accelerating 85% YoY Growth, Expands Beyond GPU Market into Server Processors
The Motley Fool USA Overview NVIDIA reported achieving $81.6 billion in revenue for Q1 FY27, marking an accelerated year-over-year growth of 85%. The company forecasts a further 95% increase to $91 billion for the current quarter, benefi... -
Semiconductor Back-End
IEEE ECTC 2026 Program Reveals Latest Research in Advanced Packaging, Including 3D Integration, Hybrid Bonding, and New Substrate Materials
IEEE Electronic Components and Technology Conference (ECTC) USA Overview The program for the 76th IEEE Electronic Components and Technology Conference (ECTC) unveiled a wide array of cutting-edge research in advanced packaging, focusing ... -
Semiconductor Back-End
Tsinghua University Develops 3D Chip Design Tool Tailored for Huawei’s ‘LogicFolding’ Architecture
Tom's Hardware China Overview Tsinghua University in China has developed a 3D chip design tool specifically tailored for Huawei’s 'LogicFolding' architecture. This tool aims to optimize chip performance and efficiency for AI and HPC appl... -
Semiconductor Back-End
IEEE ECTC 2026 Highlights Packaging Technologies Redefining AI and HPC Scalability Limits
IEEE Electronic Components and Technology Conference (ECTC) USA Overview The 2026 IEEE Electronic Components and Technology Conference (ECTC) spotlighted packaging technologies redefining AI and HPC scalability limits. Intel Foundry's R&... -
Semiconductor Back-End
Hybrid Bonding Unlocks New Frontiers in 3D Integration, Driving AI Accelerators and Chiplet Designs
PatSnap UK Overview Hybrid bonding, an innovative 3D integration technology, enables both electrical continuity and mechanical integrity without solder or microbumps by combining metal-to-metal (primarily Cu-Cu) and dielectric-to-dielect... -
Semiconductor Back-End
Intel Commits to Massive Advanced Packaging Push for Foundry Revival, EMIB Capacity Expansion Key
BusinessKorea USA Overview Intel is committing to a massive expansion of its advanced semiconductor packaging capabilities to accelerate its foundry business revival, with a core focus on expanding its proprietary EMIB (Embedded Multi-di... -
Semiconductor Back-End
CEA-Leti Demonstrates 1µm Pitch Die-to-Wafer Hybrid Bonding, Addressing AI Hardware Bottlenecks
Chiplet Marketplace France Overview CEA-Leti announced a significant advancement at ECTC 2026, demonstrating functional test vehicles utilizing die-to-wafer (D2W) hybrid bonding down to 1µm pitch, poised to resolve critical AI hardware b... -
Semiconductor Back-End
Intel to Build $3.3 Billion Glass Core Substrate Manufacturing Facility in India to Bolster Advanced Packaging Supply
TrendForce USA Overview Intel, in collaboration with 3D Glass Solutions (3DGS), is progressing with plans to invest approximately $3.3 billion in an advanced packaging glass core substrate manufacturing facility in Odisha, India. The pla...